1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
  24  */
  25 
  26 /*      Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
  27 /*      Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T   */
  28 /*              All Rights Reserved                             */
  29 /*                                                              */
  30 /*      Copyright (c) 1987, 1988 Microsoft Corporation          */
  31 /*              All Rights Reserved                             */
  32 /*                                                              */
  33 
  34 /*
  35  * Copyright 2012 Joyent, Inc. All rights reserved.
  36  */
  37 
  38 #include <sys/types.h>
  39 #include <sys/sysmacros.h>
  40 #include <sys/param.h>
  41 #include <sys/signal.h>
  42 #include <sys/systm.h>
  43 #include <sys/user.h>
  44 #include <sys/proc.h>
  45 #include <sys/disp.h>
  46 #include <sys/class.h>
  47 #include <sys/core.h>
  48 #include <sys/syscall.h>
  49 #include <sys/cpuvar.h>
  50 #include <sys/vm.h>
  51 #include <sys/sysinfo.h>
  52 #include <sys/fault.h>
  53 #include <sys/stack.h>
  54 #include <sys/psw.h>
  55 #include <sys/regset.h>
  56 #include <sys/fp.h>
  57 #include <sys/trap.h>
  58 #include <sys/kmem.h>
  59 #include <sys/vtrace.h>
  60 #include <sys/cmn_err.h>
  61 #include <sys/prsystm.h>
  62 #include <sys/mutex_impl.h>
  63 #include <sys/machsystm.h>
  64 #include <sys/archsystm.h>
  65 #include <sys/sdt.h>
  66 #include <sys/avintr.h>
  67 #include <sys/kobj.h>
  68 
  69 #include <vm/hat.h>
  70 
  71 #include <vm/seg_kmem.h>
  72 #include <vm/as.h>
  73 #include <vm/seg.h>
  74 #include <vm/hat_pte.h>
  75 #include <vm/hat_i86.h>
  76 
  77 #include <sys/procfs.h>
  78 
  79 #include <sys/reboot.h>
  80 #include <sys/debug.h>
  81 #include <sys/debugreg.h>
  82 #include <sys/modctl.h>
  83 #include <sys/aio_impl.h>
  84 #include <sys/tnf.h>
  85 #include <sys/tnf_probe.h>
  86 #include <sys/cred.h>
  87 #include <sys/mman.h>
  88 #include <sys/x86_archext.h>
  89 #include <sys/copyops.h>
  90 #include <c2/audit.h>
  91 #include <sys/ftrace.h>
  92 #include <sys/panic.h>
  93 #include <sys/traptrace.h>
  94 #include <sys/ontrap.h>
  95 #include <sys/cpc_impl.h>
  96 #include <sys/bootconf.h>
  97 #include <sys/bootinfo.h>
  98 #include <sys/promif.h>
  99 #include <sys/mach_mmu.h>
 100 #if defined(__xpv)
 101 #include <sys/hypervisor.h>
 102 #endif
 103 #include <sys/contract/process_impl.h>
 104 
 105 #define USER    0x10000         /* user-mode flag added to trap type */
 106 
 107 static const char *trap_type_mnemonic[] = {
 108         "de",   "db",   "2",    "bp",
 109         "of",   "br",   "ud",   "nm",
 110         "df",   "9",    "ts",   "np",
 111         "ss",   "gp",   "pf",   "15",
 112         "mf",   "ac",   "mc",   "xf"
 113 };
 114 
 115 static const char *trap_type[] = {
 116         "Divide error",                         /* trap id 0    */
 117         "Debug",                                /* trap id 1    */
 118         "NMI interrupt",                        /* trap id 2    */
 119         "Breakpoint",                           /* trap id 3    */
 120         "Overflow",                             /* trap id 4    */
 121         "BOUND range exceeded",                 /* trap id 5    */
 122         "Invalid opcode",                       /* trap id 6    */
 123         "Device not available",                 /* trap id 7    */
 124         "Double fault",                         /* trap id 8    */
 125         "Coprocessor segment overrun",          /* trap id 9    */
 126         "Invalid TSS",                          /* trap id 10   */
 127         "Segment not present",                  /* trap id 11   */
 128         "Stack segment fault",                  /* trap id 12   */
 129         "General protection",                   /* trap id 13   */
 130         "Page fault",                           /* trap id 14   */
 131         "Reserved",                             /* trap id 15   */
 132         "x87 floating point error",             /* trap id 16   */
 133         "Alignment check",                      /* trap id 17   */
 134         "Machine check",                        /* trap id 18   */
 135         "SIMD floating point exception",        /* trap id 19   */
 136 };
 137 
 138 #define TRAP_TYPES      (sizeof (trap_type) / sizeof (trap_type[0]))
 139 
 140 #define SLOW_SCALL_SIZE 2
 141 #define FAST_SCALL_SIZE 2
 142 
 143 int tudebug = 0;
 144 int tudebugbpt = 0;
 145 int tudebugfpe = 0;
 146 int tudebugsse = 0;
 147 
 148 #if defined(TRAPDEBUG) || defined(lint)
 149 int tdebug = 0;
 150 int lodebug = 0;
 151 int faultdebug = 0;
 152 #else
 153 #define tdebug  0
 154 #define lodebug 0
 155 #define faultdebug      0
 156 #endif /* defined(TRAPDEBUG) || defined(lint) */
 157 
 158 #if defined(TRAPTRACE)
 159 /*
 160  * trap trace record for cpu0 is allocated here.
 161  * trap trace records for non-boot cpus are allocated in mp_startup_init().
 162  */
 163 static trap_trace_rec_t trap_tr0[TRAPTR_NENT];
 164 trap_trace_ctl_t trap_trace_ctl[NCPU] = {
 165         {
 166             (uintptr_t)trap_tr0,                        /* next record */
 167             (uintptr_t)trap_tr0,                        /* first record */
 168             (uintptr_t)(trap_tr0 + TRAPTR_NENT),        /* limit */
 169             (uintptr_t)0                                /* current */
 170         },
 171 };
 172 
 173 /*
 174  * default trap buffer size
 175  */
 176 size_t trap_trace_bufsize = TRAPTR_NENT * sizeof (trap_trace_rec_t);
 177 int trap_trace_freeze = 0;
 178 int trap_trace_off = 0;
 179 
 180 /*
 181  * A dummy TRAPTRACE entry to use after death.
 182  */
 183 trap_trace_rec_t trap_trace_postmort;
 184 
 185 static void dump_ttrace(void);
 186 #endif  /* TRAPTRACE */
 187 static void dumpregs(struct regs *);
 188 static void showregs(uint_t, struct regs *, caddr_t);
 189 static int kern_gpfault(struct regs *);
 190 
 191 /*ARGSUSED*/
 192 static int
 193 die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid)
 194 {
 195         struct panic_trap_info ti;
 196         const char *trap_name, *trap_mnemonic;
 197 
 198         if (type < TRAP_TYPES) {
 199                 trap_name = trap_type[type];
 200                 trap_mnemonic = trap_type_mnemonic[type];
 201         } else {
 202                 trap_name = "trap";
 203                 trap_mnemonic = "-";
 204         }
 205 
 206 #ifdef TRAPTRACE
 207         TRAPTRACE_FREEZE;
 208 #endif
 209 
 210         ti.trap_regs = rp;
 211         ti.trap_type = type & ~USER;
 212         ti.trap_addr = addr;
 213 
 214         curthread->t_panic_trap = &ti;
 215 
 216         if (type == T_PGFLT && addr < (caddr_t)KERNELBASE) {
 217                 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p "
 218                     "occurred in module \"%s\" due to %s",
 219                     type, trap_mnemonic, trap_name, (void *)rp, (void *)addr,
 220                     mod_containing_pc((caddr_t)rp->r_pc),
 221                     addr < (caddr_t)PAGESIZE ?
 222                     "a NULL pointer dereference" :
 223                     "an illegal access to a user address");
 224         } else
 225                 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p",
 226                     type, trap_mnemonic, trap_name, (void *)rp, (void *)addr);
 227         return (0);
 228 }
 229 
 230 /*
 231  * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction.
 232  *
 233  * int <vector> is two bytes: 0xCD <vector>
 234  */
 235 
 236 static int
 237 rewrite_syscall(caddr_t pc)
 238 {
 239         uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT };
 240 
 241         if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE,
 242             (uintptr_t)pc) != 0)
 243                 return (1);
 244 
 245         return (0);
 246 }
 247 
 248 /*
 249  * Test to see if the instruction at pc is sysenter or syscall. The second
 250  * argument should be the x86 feature flag corresponding to the expected
 251  * instruction.
 252  *
 253  * sysenter is two bytes: 0x0F 0x34
 254  * syscall is two bytes:  0x0F 0x05
 255  * int $T_SYSCALLINT is two bytes: 0xCD 0x91
 256  */
 257 
 258 static int
 259 instr_is_other_syscall(caddr_t pc, int which)
 260 {
 261         uchar_t instr[FAST_SCALL_SIZE];
 262 
 263         ASSERT(which == X86FSET_SEP || which == X86FSET_ASYSC || which == 0xCD);
 264 
 265         if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0)
 266                 return (0);
 267 
 268         switch (which) {
 269         case X86FSET_SEP:
 270                 if (instr[0] == 0x0F && instr[1] == 0x34)
 271                         return (1);
 272                 break;
 273         case X86FSET_ASYSC:
 274                 if (instr[0] == 0x0F && instr[1] == 0x05)
 275                         return (1);
 276                 break;
 277         case 0xCD:
 278                 if (instr[0] == 0xCD && instr[1] == T_SYSCALLINT)
 279                         return (1);
 280                 break;
 281         }
 282 
 283         return (0);
 284 }
 285 
 286 static const char *
 287 syscall_insn_string(int syscall_insn)
 288 {
 289         switch (syscall_insn) {
 290         case X86FSET_SEP:
 291                 return ("sysenter");
 292         case X86FSET_ASYSC:
 293                 return ("syscall");
 294         case 0xCD:
 295                 return ("int");
 296         default:
 297                 return ("Unknown");
 298         }
 299 }
 300 
 301 static int
 302 ldt_rewrite_syscall(struct regs *rp, proc_t *p, int syscall_insn)
 303 {
 304         caddr_t linearpc;
 305         int return_code = 0;
 306 
 307         mutex_enter(&p->p_ldtlock);      /* Must be held across linear_pc() */
 308 
 309         if (linear_pc(rp, p, &linearpc) == 0) {
 310 
 311                 /*
 312                  * If another thread beat us here, it already changed
 313                  * this site to the slower (int) syscall instruction.
 314                  */
 315                 if (instr_is_other_syscall(linearpc, 0xCD)) {
 316                         return_code = 1;
 317                 } else if (instr_is_other_syscall(linearpc, syscall_insn)) {
 318 
 319                         if (rewrite_syscall(linearpc) == 0) {
 320                                 return_code = 1;
 321                         }
 322 #ifdef DEBUG
 323                         else
 324                                 cmn_err(CE_WARN, "failed to rewrite %s "
 325                                     "instruction in process %d",
 326                                     syscall_insn_string(syscall_insn),
 327                                     p->p_pid);
 328 #endif /* DEBUG */
 329                 }
 330         }
 331 
 332         mutex_exit(&p->p_ldtlock);       /* Must be held across linear_pc() */
 333 
 334         return (return_code);
 335 }
 336 
 337 /*
 338  * Test to see if the instruction at pc is a system call instruction.
 339  *
 340  * The bytes of an lcall instruction used for the syscall trap.
 341  * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 };
 342  * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 };
 343  */
 344 
 345 #define LCALLSIZE       7
 346 
 347 static int
 348 instr_is_lcall_syscall(caddr_t pc)
 349 {
 350         uchar_t instr[LCALLSIZE];
 351 
 352         if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 &&
 353             instr[0] == 0x9a &&
 354             instr[1] == 0 &&
 355             instr[2] == 0 &&
 356             instr[3] == 0 &&
 357             instr[4] == 0 &&
 358             (instr[5] == 0x7 || instr[5] == 0x27) &&
 359             instr[6] == 0)
 360                 return (1);
 361 
 362         return (0);
 363 }
 364 
 365 #ifdef __amd64
 366 
 367 /*
 368  * In the first revisions of amd64 CPUs produced by AMD, the LAHF and
 369  * SAHF instructions were not implemented in 64-bit mode. Later revisions
 370  * did implement these instructions. An extension to the cpuid instruction
 371  * was added to check for the capability of executing these instructions
 372  * in 64-bit mode.
 373  *
 374  * Intel originally did not implement these instructions in EM64T either,
 375  * but added them in later revisions.
 376  *
 377  * So, there are different chip revisions by both vendors out there that
 378  * may or may not implement these instructions. The easy solution is to
 379  * just always emulate these instructions on demand.
 380  *
 381  * SAHF == store %ah in the lower 8 bits of %rflags (opcode 0x9e)
 382  * LAHF == load the lower 8 bits of %rflags into %ah (opcode 0x9f)
 383  */
 384 
 385 #define LSAHFSIZE 1
 386 
 387 static int
 388 instr_is_lsahf(caddr_t pc, uchar_t *instr)
 389 {
 390         if (copyin_nowatch(pc, (caddr_t)instr, LSAHFSIZE) == 0 &&
 391             (*instr == 0x9e || *instr == 0x9f))
 392                 return (1);
 393         return (0);
 394 }
 395 
 396 /*
 397  * Emulate the LAHF and SAHF instructions. The reference manuals define
 398  * these instructions to always load/store bit 1 as a 1, and bits 3 and 5
 399  * as a 0. The other, defined, bits are copied (the PS_ICC bits and PS_P).
 400  *
 401  * Note that %ah is bits 8-15 of %rax.
 402  */
 403 static void
 404 emulate_lsahf(struct regs *rp, uchar_t instr)
 405 {
 406         if (instr == 0x9e) {
 407                 /* sahf. Copy bits from %ah to flags. */
 408                 rp->r_ps = (rp->r_ps & ~0xff) |
 409                     ((rp->r_rax >> 8) & PSL_LSAHFMASK) | PS_MB1;
 410         } else {
 411                 /* lahf. Copy bits from flags to %ah. */
 412                 rp->r_rax = (rp->r_rax & ~0xff00) |
 413                     (((rp->r_ps & PSL_LSAHFMASK) | PS_MB1) << 8);
 414         }
 415         rp->r_pc += LSAHFSIZE;
 416 }
 417 #endif /* __amd64 */
 418 
 419 #ifdef OPTERON_ERRATUM_91
 420 
 421 /*
 422  * Test to see if the instruction at pc is a prefetch instruction.
 423  *
 424  * The first byte of prefetch instructions is always 0x0F.
 425  * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch.
 426  * The third byte (ModRM) contains the register field bits (bits 3-5).
 427  * These bits must be between 0 and 3 inclusive for regular prefetch and
 428  * 0 and 1 inclusive for AMD 3dnow prefetch.
 429  *
 430  * In 64-bit mode, there may be a one-byte REX prefex (0x40-0x4F).
 431  */
 432 
 433 static int
 434 cmp_to_prefetch(uchar_t *p)
 435 {
 436 #ifdef _LP64
 437         if ((p[0] & 0xF0) == 0x40)  /* 64-bit REX prefix */
 438                 p++;
 439 #endif
 440         return ((p[0] == 0x0F && p[1] == 0x18 && ((p[2] >> 3) & 7) <= 3) ||
 441             (p[0] == 0x0F && p[1] == 0x0D && ((p[2] >> 3) & 7) <= 1));
 442 }
 443 
 444 static int
 445 instr_is_prefetch(caddr_t pc)
 446 {
 447         uchar_t instr[4];       /* optional REX prefix plus 3-byte opcode */
 448 
 449         return (copyin_nowatch(pc, instr, sizeof (instr)) == 0 &&
 450             cmp_to_prefetch(instr));
 451 }
 452 
 453 #endif /* OPTERON_ERRATUM_91 */
 454 
 455 /*
 456  * Called from the trap handler when a processor trap occurs.
 457  *
 458  * Note: All user-level traps that might call stop() must exit
 459  * trap() by 'goto out' or by falling through.
 460  * Note Also: trap() is usually called with interrupts enabled, (PS_IE == 1)
 461  * however, there are paths that arrive here with PS_IE == 0 so special care
 462  * must be taken in those cases.
 463  */
 464 void
 465 trap(struct regs *rp, caddr_t addr, processorid_t cpuid)
 466 {
 467         kthread_t *ct = curthread;
 468         enum seg_rw rw;
 469         unsigned type;
 470         proc_t *p = ttoproc(ct);
 471         klwp_t *lwp = ttolwp(ct);
 472         uintptr_t lofault;
 473         label_t *onfault;
 474         faultcode_t pagefault(), res, errcode;
 475         enum fault_type fault_type;
 476         k_siginfo_t siginfo;
 477         uint_t fault = 0;
 478         int mstate;
 479         int sicode = 0;
 480         int watchcode;
 481         int watchpage;
 482         caddr_t vaddr;
 483         int singlestep_twiddle;
 484         size_t sz;
 485         int ta;
 486 #ifdef __amd64
 487         uchar_t instr;
 488 #endif
 489 
 490         ASSERT_STACK_ALIGNED();
 491 
 492         type = rp->r_trapno;
 493         CPU_STATS_ADDQ(CPU, sys, trap, 1);
 494 
 495         if (type == T_PGFLT) {
 496 
 497                 errcode = rp->r_err;
 498                 if (errcode & PF_ERR_WRITE)
 499                         rw = S_WRITE;
 500                 else if ((caddr_t)rp->r_pc == addr ||
 501                     (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC)))
 502                         rw = S_EXEC;
 503                 else
 504                         rw = S_READ;
 505 
 506 #if defined(__i386)
 507                 /*
 508                  * Pentium Pro work-around
 509                  */
 510                 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) {
 511                         uint_t  attr;
 512                         uint_t  priv_violation;
 513                         uint_t  access_violation;
 514 
 515                         if (hat_getattr(addr < (caddr_t)kernelbase ?
 516                             curproc->p_as->a_hat : kas.a_hat, addr, &attr)
 517                             == -1) {
 518                                 errcode &= ~PF_ERR_PROT;
 519                         } else {
 520                                 priv_violation = (errcode & PF_ERR_USER) &&
 521                                     !(attr & PROT_USER);
 522                                 access_violation = (errcode & PF_ERR_WRITE) &&
 523                                     !(attr & PROT_WRITE);
 524                                 if (!priv_violation && !access_violation)
 525                                         goto cleanup;
 526                         }
 527                 }
 528 #endif /* __i386 */
 529 
 530         } else if (type == T_SGLSTP && lwp != NULL)
 531                 lwp->lwp_pcb.pcb_drstat = (uintptr_t)addr;
 532 
 533         if (tdebug)
 534                 showregs(type, rp, addr);
 535 
 536         if (USERMODE(rp->r_cs)) {
 537                 /*
 538                  * Set up the current cred to use during this trap. u_cred
 539                  * no longer exists.  t_cred is used instead.
 540                  * The current process credential applies to the thread for
 541                  * the entire trap.  If trapping from the kernel, this
 542                  * should already be set up.
 543                  */
 544                 if (ct->t_cred != p->p_cred) {
 545                         cred_t *oldcred = ct->t_cred;
 546                         /*
 547                          * DTrace accesses t_cred in probe context.  t_cred
 548                          * must always be either NULL, or point to a valid,
 549                          * allocated cred structure.
 550                          */
 551                         ct->t_cred = crgetcred();
 552                         crfree(oldcred);
 553                 }
 554                 ASSERT(lwp != NULL);
 555                 type |= USER;
 556                 ASSERT(lwptoregs(lwp) == rp);
 557                 lwp->lwp_state = LWP_SYS;
 558 
 559                 switch (type) {
 560                 case T_PGFLT + USER:
 561                         if ((caddr_t)rp->r_pc == addr)
 562                                 mstate = LMS_TFAULT;
 563                         else
 564                                 mstate = LMS_DFAULT;
 565                         break;
 566                 default:
 567                         mstate = LMS_TRAP;
 568                         break;
 569                 }
 570                 /* Kernel probe */
 571                 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */,
 572                     tnf_microstate, state, mstate);
 573                 mstate = new_mstate(ct, mstate);
 574 
 575                 bzero(&siginfo, sizeof (siginfo));
 576         }
 577 
 578         switch (type) {
 579         case T_PGFLT + USER:
 580         case T_SGLSTP:
 581         case T_SGLSTP + USER:
 582         case T_BPTFLT + USER:
 583                 break;
 584 
 585         default:
 586                 FTRACE_2("trap(): type=0x%lx, regs=0x%lx",
 587                     (ulong_t)type, (ulong_t)rp);
 588                 break;
 589         }
 590 
 591         switch (type) {
 592         case T_SIMDFPE:
 593                 /* Make sure we enable interrupts before die()ing */
 594                 sti();  /* The SIMD exception comes in via cmninttrap */
 595                 /*FALLTHROUGH*/
 596         default:
 597                 if (type & USER) {
 598                         if (tudebug)
 599                                 showregs(type, rp, (caddr_t)0);
 600                         printf("trap: Unknown trap type %d in user mode\n",
 601                             type & ~USER);
 602                         siginfo.si_signo = SIGILL;
 603                         siginfo.si_code  = ILL_ILLTRP;
 604                         siginfo.si_addr  = (caddr_t)rp->r_pc;
 605                         siginfo.si_trapno = type & ~USER;
 606                         fault = FLTILL;
 607                         break;
 608                 } else {
 609                         (void) die(type, rp, addr, cpuid);
 610                         /*NOTREACHED*/
 611                 }
 612 
 613         case T_PGFLT:           /* system page fault */
 614                 /*
 615                  * If we're under on_trap() protection (see <sys/ontrap.h>),
 616                  * set ot_trap and bounce back to the on_trap() call site
 617                  * via the installed trampoline.
 618                  */
 619                 if ((ct->t_ontrap != NULL) &&
 620                     (ct->t_ontrap->ot_prot & OT_DATA_ACCESS)) {
 621                         ct->t_ontrap->ot_trap |= OT_DATA_ACCESS;
 622                         rp->r_pc = ct->t_ontrap->ot_trampoline;
 623                         goto cleanup;
 624                 }
 625 
 626                 /*
 627                  * See if we can handle as pagefault. Save lofault and onfault
 628                  * across this. Here we assume that an address less than
 629                  * KERNELBASE is a user fault.  We can do this as copy.s
 630                  * routines verify that the starting address is less than
 631                  * KERNELBASE before starting and because we know that we
 632                  * always have KERNELBASE mapped as invalid to serve as a
 633                  * "barrier".
 634                  */
 635                 lofault = ct->t_lofault;
 636                 onfault = ct->t_onfault;
 637                 ct->t_lofault = 0;
 638 
 639                 mstate = new_mstate(ct, LMS_KFAULT);
 640 
 641                 if (addr < (caddr_t)kernelbase) {
 642                         res = pagefault(addr,
 643                             (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0);
 644                         if (res == FC_NOMAP &&
 645                             addr < p->p_usrstack &&
 646                             grow(addr))
 647                                 res = 0;
 648                 } else {
 649                         res = pagefault(addr,
 650                             (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1);
 651                 }
 652                 (void) new_mstate(ct, mstate);
 653 
 654                 /*
 655                  * Restore lofault and onfault. If we resolved the fault, exit.
 656                  * If we didn't and lofault wasn't set, die.
 657                  */
 658                 ct->t_lofault = lofault;
 659                 ct->t_onfault = onfault;
 660                 if (res == 0)
 661                         goto cleanup;
 662 
 663 #if defined(OPTERON_ERRATUM_93) && defined(_LP64)
 664                 if (lofault == 0 && opteron_erratum_93) {
 665                         /*
 666                          * Workaround for Opteron Erratum 93. On return from
 667                          * a System Managment Interrupt at a HLT instruction
 668                          * the %rip might be truncated to a 32 bit value.
 669                          * BIOS is supposed to fix this, but some don't.
 670                          * If this occurs we simply restore the high order bits.
 671                          * The HLT instruction is 1 byte of 0xf4.
 672                          */
 673                         uintptr_t       rip = rp->r_pc;
 674 
 675                         if ((rip & 0xfffffffful) == rip) {
 676                                 rip |= 0xfffffffful << 32;
 677                                 if (hat_getpfnum(kas.a_hat, (caddr_t)rip) !=
 678                                     PFN_INVALID &&
 679                                     (*(uchar_t *)rip == 0xf4 ||
 680                                     *(uchar_t *)(rip - 1) == 0xf4)) {
 681                                         rp->r_pc = rip;
 682                                         goto cleanup;
 683                                 }
 684                         }
 685                 }
 686 #endif /* OPTERON_ERRATUM_93 && _LP64 */
 687 
 688 #ifdef OPTERON_ERRATUM_91
 689                 if (lofault == 0 && opteron_erratum_91) {
 690                         /*
 691                          * Workaround for Opteron Erratum 91. Prefetches may
 692                          * generate a page fault (they're not supposed to do
 693                          * that!). If this occurs we simply return back to the
 694                          * instruction.
 695                          */
 696                         caddr_t         pc = (caddr_t)rp->r_pc;
 697 
 698                         /*
 699                          * If the faulting PC is not mapped, this is a
 700                          * legitimate kernel page fault that must result in a
 701                          * panic. If the faulting PC is mapped, it could contain
 702                          * a prefetch instruction. Check for that here.
 703                          */
 704                         if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) {
 705                                 if (cmp_to_prefetch((uchar_t *)pc)) {
 706 #ifdef DEBUG
 707                                         cmn_err(CE_WARN, "Opteron erratum 91 "
 708                                             "occurred: kernel prefetch"
 709                                             " at %p generated a page fault!",
 710                                             (void *)rp->r_pc);
 711 #endif /* DEBUG */
 712                                         goto cleanup;
 713                                 }
 714                         }
 715                         (void) die(type, rp, addr, cpuid);
 716                 }
 717 #endif /* OPTERON_ERRATUM_91 */
 718 
 719                 if (lofault == 0)
 720                         (void) die(type, rp, addr, cpuid);
 721 
 722                 /*
 723                  * Cannot resolve fault.  Return to lofault.
 724                  */
 725                 if (lodebug) {
 726                         showregs(type, rp, addr);
 727                         traceregs(rp);
 728                 }
 729                 if (FC_CODE(res) == FC_OBJERR)
 730                         res = FC_ERRNO(res);
 731                 else
 732                         res = EFAULT;
 733                 rp->r_r0 = res;
 734                 rp->r_pc = ct->t_lofault;
 735                 goto cleanup;
 736 
 737         case T_PGFLT + USER:    /* user page fault */
 738                 if (faultdebug) {
 739                         char *fault_str;
 740 
 741                         switch (rw) {
 742                         case S_READ:
 743                                 fault_str = "read";
 744                                 break;
 745                         case S_WRITE:
 746                                 fault_str = "write";
 747                                 break;
 748                         case S_EXEC:
 749                                 fault_str = "exec";
 750                                 break;
 751                         default:
 752                                 fault_str = "";
 753                                 break;
 754                         }
 755                         printf("user %s fault:  addr=0x%lx errcode=0x%x\n",
 756                             fault_str, (uintptr_t)addr, errcode);
 757                 }
 758 
 759 #if defined(OPTERON_ERRATUM_100) && defined(_LP64)
 760                 /*
 761                  * Workaround for AMD erratum 100
 762                  *
 763                  * A 32-bit process may receive a page fault on a non
 764                  * 32-bit address by mistake. The range of the faulting
 765                  * address will be
 766                  *
 767                  *      0xffffffff80000000 .. 0xffffffffffffffff or
 768                  *      0x0000000100000000 .. 0x000000017fffffff
 769                  *
 770                  * The fault is always due to an instruction fetch, however
 771                  * the value of r_pc should be correct (in 32 bit range),
 772                  * so we ignore the page fault on the bogus address.
 773                  */
 774                 if (p->p_model == DATAMODEL_ILP32 &&
 775                     (0xffffffff80000000 <= (uintptr_t)addr ||
 776                     (0x100000000 <= (uintptr_t)addr &&
 777                     (uintptr_t)addr <= 0x17fffffff))) {
 778                         if (!opteron_erratum_100)
 779                                 panic("unexpected erratum #100");
 780                         if (rp->r_pc <= 0xffffffff)
 781                                 goto out;
 782                 }
 783 #endif /* OPTERON_ERRATUM_100 && _LP64 */
 784 
 785                 ASSERT(!(curthread->t_flag & T_WATCHPT));
 786                 watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw));
 787 #ifdef __i386
 788                 /*
 789                  * In 32-bit mode, the lcall (system call) instruction fetches
 790                  * one word from the stack, at the stack pointer, because of the
 791                  * way the call gate is constructed.  This is a bogus
 792                  * read and should not be counted as a read watchpoint.
 793                  * We work around the problem here by testing to see if
 794                  * this situation applies and, if so, simply jumping to
 795                  * the code in locore.s that fields the system call trap.
 796                  * The registers on the stack are already set up properly
 797                  * due to the match between the call gate sequence and the
 798                  * trap gate sequence.  We just have to adjust the pc.
 799                  */
 800                 if (watchpage && addr == (caddr_t)rp->r_sp &&
 801                     rw == S_READ && instr_is_lcall_syscall((caddr_t)rp->r_pc)) {
 802                         extern void watch_syscall(void);
 803 
 804                         rp->r_pc += LCALLSIZE;
 805                         watch_syscall();        /* never returns */
 806                         /* NOTREACHED */
 807                 }
 808 #endif /* __i386 */
 809                 vaddr = addr;
 810                 if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0)
 811                         fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL;
 812                 else if ((watchcode = pr_is_watchpoint(&vaddr, &ta,
 813                     sz, NULL, rw)) != 0) {
 814                         if (ta) {
 815                                 do_watch_step(vaddr, sz, rw,
 816                                     watchcode, rp->r_pc);
 817                                 fault_type = F_INVAL;
 818                         } else {
 819                                 bzero(&siginfo, sizeof (siginfo));
 820                                 siginfo.si_signo = SIGTRAP;
 821                                 siginfo.si_code = watchcode;
 822                                 siginfo.si_addr = vaddr;
 823                                 siginfo.si_trapafter = 0;
 824                                 siginfo.si_pc = (caddr_t)rp->r_pc;
 825                                 fault = FLTWATCH;
 826                                 break;
 827                         }
 828                 } else {
 829                         /* XXX pr_watch_emul() never succeeds (for now) */
 830                         if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw))
 831                                 goto out;
 832                         do_watch_step(vaddr, sz, rw, 0, 0);
 833                         fault_type = F_INVAL;
 834                 }
 835 
 836                 res = pagefault(addr, fault_type, rw, 0);
 837 
 838                 /*
 839                  * If pagefault() succeeded, ok.
 840                  * Otherwise attempt to grow the stack.
 841                  */
 842                 if (res == 0 ||
 843                     (res == FC_NOMAP &&
 844                     addr < p->p_usrstack &&
 845                     grow(addr))) {
 846                         lwp->lwp_lastfault = FLTPAGE;
 847                         lwp->lwp_lastfaddr = addr;
 848                         if (prismember(&p->p_fltmask, FLTPAGE)) {
 849                                 bzero(&siginfo, sizeof (siginfo));
 850                                 siginfo.si_addr = addr;
 851                                 (void) stop_on_fault(FLTPAGE, &siginfo);
 852                         }
 853                         goto out;
 854                 } else if (res == FC_PROT && addr < p->p_usrstack &&
 855                     (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) {
 856                         report_stack_exec(p, addr);
 857                 }
 858 
 859 #ifdef OPTERON_ERRATUM_91
 860                 /*
 861                  * Workaround for Opteron Erratum 91. Prefetches may generate a
 862                  * page fault (they're not supposed to do that!). If this
 863                  * occurs we simply return back to the instruction.
 864                  *
 865                  * We rely on copyin to properly fault in the page with r_pc.
 866                  */
 867                 if (opteron_erratum_91 &&
 868                     addr != (caddr_t)rp->r_pc &&
 869                     instr_is_prefetch((caddr_t)rp->r_pc)) {
 870 #ifdef DEBUG
 871                         cmn_err(CE_WARN, "Opteron erratum 91 occurred: "
 872                             "prefetch at %p in pid %d generated a trap!",
 873                             (void *)rp->r_pc, p->p_pid);
 874 #endif /* DEBUG */
 875                         goto out;
 876                 }
 877 #endif /* OPTERON_ERRATUM_91 */
 878 
 879                 if (tudebug)
 880                         showregs(type, rp, addr);
 881                 /*
 882                  * In the case where both pagefault and grow fail,
 883                  * set the code to the value provided by pagefault.
 884                  * We map all errors returned from pagefault() to SIGSEGV.
 885                  */
 886                 bzero(&siginfo, sizeof (siginfo));
 887                 siginfo.si_addr = addr;
 888                 switch (FC_CODE(res)) {
 889                 case FC_HWERR:
 890                 case FC_NOSUPPORT:
 891                         siginfo.si_signo = SIGBUS;
 892                         siginfo.si_code = BUS_ADRERR;
 893                         fault = FLTACCESS;
 894                         break;
 895                 case FC_ALIGN:
 896                         siginfo.si_signo = SIGBUS;
 897                         siginfo.si_code = BUS_ADRALN;
 898                         fault = FLTACCESS;
 899                         break;
 900                 case FC_OBJERR:
 901                         if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) {
 902                                 siginfo.si_signo = SIGBUS;
 903                                 siginfo.si_code = BUS_OBJERR;
 904                                 fault = FLTACCESS;
 905                         }
 906                         break;
 907                 default:        /* FC_NOMAP or FC_PROT */
 908                         siginfo.si_signo = SIGSEGV;
 909                         siginfo.si_code =
 910                             (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR;
 911                         fault = FLTBOUNDS;
 912                         break;
 913                 }
 914                 break;
 915 
 916         case T_ILLINST + USER:  /* invalid opcode fault */
 917                 /*
 918                  * If the syscall instruction is disabled due to LDT usage, a
 919                  * user program that attempts to execute it will trigger a #ud
 920                  * trap. Check for that case here. If this occurs on a CPU which
 921                  * doesn't even support syscall, the result of all of this will
 922                  * be to emulate that particular instruction.
 923                  */
 924                 if (p->p_ldt != NULL &&
 925                     ldt_rewrite_syscall(rp, p, X86FSET_ASYSC))
 926                         goto out;
 927 
 928 #ifdef __amd64
 929                 /*
 930                  * Emulate the LAHF and SAHF instructions if needed.
 931                  * See the instr_is_lsahf function for details.
 932                  */
 933                 if (p->p_model == DATAMODEL_LP64 &&
 934                     instr_is_lsahf((caddr_t)rp->r_pc, &instr)) {
 935                         emulate_lsahf(rp, instr);
 936                         goto out;
 937                 }
 938 #endif
 939 
 940                 /*FALLTHROUGH*/
 941 
 942                 if (tudebug)
 943                         showregs(type, rp, (caddr_t)0);
 944                 siginfo.si_signo = SIGILL;
 945                 siginfo.si_code  = ILL_ILLOPC;
 946                 siginfo.si_addr  = (caddr_t)rp->r_pc;
 947                 fault = FLTILL;
 948                 break;
 949 
 950         case T_ZERODIV + USER:          /* integer divide by zero */
 951                 if (tudebug && tudebugfpe)
 952                         showregs(type, rp, (caddr_t)0);
 953                 siginfo.si_signo = SIGFPE;
 954                 siginfo.si_code  = FPE_INTDIV;
 955                 siginfo.si_addr  = (caddr_t)rp->r_pc;
 956                 fault = FLTIZDIV;
 957                 break;
 958 
 959         case T_OVFLW + USER:    /* integer overflow */
 960                 if (tudebug && tudebugfpe)
 961                         showregs(type, rp, (caddr_t)0);
 962                 siginfo.si_signo = SIGFPE;
 963                 siginfo.si_code  = FPE_INTOVF;
 964                 siginfo.si_addr  = (caddr_t)rp->r_pc;
 965                 fault = FLTIOVF;
 966                 break;
 967 
 968         case T_NOEXTFLT + USER: /* math coprocessor not available */
 969                 if (tudebug && tudebugfpe)
 970                         showregs(type, rp, addr);
 971                 if (fpnoextflt(rp)) {
 972                         siginfo.si_signo = SIGILL;
 973                         siginfo.si_code  = ILL_ILLOPC;
 974                         siginfo.si_addr  = (caddr_t)rp->r_pc;
 975                         fault = FLTILL;
 976                 }
 977                 break;
 978 
 979         case T_EXTOVRFLT:       /* extension overrun fault */
 980                 /* check if we took a kernel trap on behalf of user */
 981                 {
 982                         extern  void ndptrap_frstor(void);
 983                         if (rp->r_pc != (uintptr_t)ndptrap_frstor) {
 984                                 sti(); /* T_EXTOVRFLT comes in via cmninttrap */
 985                                 (void) die(type, rp, addr, cpuid);
 986                         }
 987                         type |= USER;
 988                 }
 989                 /*FALLTHROUGH*/
 990         case T_EXTOVRFLT + USER:        /* extension overrun fault */
 991                 if (tudebug && tudebugfpe)
 992                         showregs(type, rp, addr);
 993                 if (fpextovrflt(rp)) {
 994                         siginfo.si_signo = SIGSEGV;
 995                         siginfo.si_code  = SEGV_MAPERR;
 996                         siginfo.si_addr  = (caddr_t)rp->r_pc;
 997                         fault = FLTBOUNDS;
 998                 }
 999                 break;
1000 
1001         case T_EXTERRFLT:       /* x87 floating point exception pending */
1002                 /* check if we took a kernel trap on behalf of user */
1003                 {
1004                         extern  void ndptrap_frstor(void);
1005                         if (rp->r_pc != (uintptr_t)ndptrap_frstor) {
1006                                 sti(); /* T_EXTERRFLT comes in via cmninttrap */
1007                                 (void) die(type, rp, addr, cpuid);
1008                         }
1009                         type |= USER;
1010                 }
1011                 /*FALLTHROUGH*/
1012 
1013         case T_EXTERRFLT + USER: /* x87 floating point exception pending */
1014                 if (tudebug && tudebugfpe)
1015                         showregs(type, rp, addr);
1016                 if (sicode = fpexterrflt(rp)) {
1017                         siginfo.si_signo = SIGFPE;
1018                         siginfo.si_code  = sicode;
1019                         siginfo.si_addr  = (caddr_t)rp->r_pc;
1020                         fault = FLTFPE;
1021                 }
1022                 break;
1023 
1024         case T_SIMDFPE + USER:          /* SSE and SSE2 exceptions */
1025                 if (tudebug && tudebugsse)
1026                         showregs(type, rp, addr);
1027                 if (!is_x86_feature(x86_featureset, X86FSET_SSE) &&
1028                     !is_x86_feature(x86_featureset, X86FSET_SSE2)) {
1029                         /*
1030                          * There are rumours that some user instructions
1031                          * on older CPUs can cause this trap to occur; in
1032                          * which case send a SIGILL instead of a SIGFPE.
1033                          */
1034                         siginfo.si_signo = SIGILL;
1035                         siginfo.si_code  = ILL_ILLTRP;
1036                         siginfo.si_addr  = (caddr_t)rp->r_pc;
1037                         siginfo.si_trapno = type & ~USER;
1038                         fault = FLTILL;
1039                 } else if ((sicode = fpsimderrflt(rp)) != 0) {
1040                         siginfo.si_signo = SIGFPE;
1041                         siginfo.si_code = sicode;
1042                         siginfo.si_addr = (caddr_t)rp->r_pc;
1043                         fault = FLTFPE;
1044                 }
1045 
1046                 sti();  /* The SIMD exception comes in via cmninttrap */
1047                 break;
1048 
1049         case T_BPTFLT:  /* breakpoint trap */
1050                 /*
1051                  * Kernel breakpoint traps should only happen when kmdb is
1052                  * active, and even then, it'll have interposed on the IDT, so
1053                  * control won't get here.  If it does, we've hit a breakpoint
1054                  * without the debugger, which is very strange, and very
1055                  * fatal.
1056                  */
1057                 if (tudebug && tudebugbpt)
1058                         showregs(type, rp, (caddr_t)0);
1059 
1060                 (void) die(type, rp, addr, cpuid);
1061                 break;
1062 
1063         case T_SGLSTP: /* single step/hw breakpoint exception */
1064 
1065                 /* Now evaluate how we got here */
1066                 if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) {
1067                         /*
1068                          * i386 single-steps even through lcalls which
1069                          * change the privilege level. So we take a trap at
1070                          * the first instruction in privileged mode.
1071                          *
1072                          * Set a flag to indicate that upon completion of
1073                          * the system call, deal with the single-step trap.
1074                          *
1075                          * The same thing happens for sysenter, too.
1076                          */
1077                         singlestep_twiddle = 0;
1078                         if (rp->r_pc == (uintptr_t)sys_sysenter ||
1079                             rp->r_pc == (uintptr_t)brand_sys_sysenter) {
1080                                 singlestep_twiddle = 1;
1081 #if defined(__amd64)
1082                                 /*
1083                                  * Since we are already on the kernel's
1084                                  * %gs, on 64-bit systems the sysenter case
1085                                  * needs to adjust the pc to avoid
1086                                  * executing the swapgs instruction at the
1087                                  * top of the handler.
1088                                  */
1089                                 if (rp->r_pc == (uintptr_t)sys_sysenter)
1090                                         rp->r_pc = (uintptr_t)
1091                                             _sys_sysenter_post_swapgs;
1092                                 else
1093                                         rp->r_pc = (uintptr_t)
1094                                             _brand_sys_sysenter_post_swapgs;
1095 #endif
1096                         }
1097 #if defined(__i386)
1098                         else if (rp->r_pc == (uintptr_t)sys_call ||
1099                             rp->r_pc == (uintptr_t)brand_sys_call) {
1100                                 singlestep_twiddle = 1;
1101                         }
1102 #endif
1103                         else {
1104                                 /* not on sysenter/syscall; uregs available */
1105                                 if (tudebug && tudebugbpt)
1106                                         showregs(type, rp, (caddr_t)0);
1107                         }
1108                         if (singlestep_twiddle) {
1109                                 rp->r_ps &= ~PS_T; /* turn off trace */
1110                                 lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING;
1111                                 ct->t_post_sys = 1;
1112                                 aston(curthread);
1113                                 goto cleanup;
1114                         }
1115                 }
1116                 /* XXX - needs review on debugger interface? */
1117                 if (boothowto & RB_DEBUG)
1118                         debug_enter((char *)NULL);
1119                 else
1120                         (void) die(type, rp, addr, cpuid);
1121                 break;
1122 
1123         case T_NMIFLT:  /* NMI interrupt */
1124                 printf("Unexpected NMI in system mode\n");
1125                 goto cleanup;
1126 
1127         case T_NMIFLT + USER:   /* NMI interrupt */
1128                 printf("Unexpected NMI in user mode\n");
1129                 break;
1130 
1131         case T_GPFLT:   /* general protection violation */
1132                 /*
1133                  * Any #GP that occurs during an on_trap .. no_trap bracket
1134                  * with OT_DATA_ACCESS or OT_SEGMENT_ACCESS protection,
1135                  * or in a on_fault .. no_fault bracket, is forgiven
1136                  * and we trampoline.  This protection is given regardless
1137                  * of whether we are 32/64 bit etc - if a distinction is
1138                  * required then define new on_trap protection types.
1139                  *
1140                  * On amd64, we can get a #gp from referencing addresses
1141                  * in the virtual address hole e.g. from a copyin or in
1142                  * update_sregs while updating user segment registers.
1143                  *
1144                  * On the 32-bit hypervisor we could also generate one in
1145                  * mfn_to_pfn by reaching around or into where the hypervisor
1146                  * lives which is protected by segmentation.
1147                  */
1148 
1149                 /*
1150                  * If we're under on_trap() protection (see <sys/ontrap.h>),
1151                  * set ot_trap and trampoline back to the on_trap() call site
1152                  * for OT_DATA_ACCESS or OT_SEGMENT_ACCESS.
1153                  */
1154                 if (ct->t_ontrap != NULL) {
1155                         int ttype =  ct->t_ontrap->ot_prot &
1156                             (OT_DATA_ACCESS | OT_SEGMENT_ACCESS);
1157 
1158                         if (ttype != 0) {
1159                                 ct->t_ontrap->ot_trap |= ttype;
1160                                 if (tudebug)
1161                                         showregs(type, rp, (caddr_t)0);
1162                                 rp->r_pc = ct->t_ontrap->ot_trampoline;
1163                                 goto cleanup;
1164                         }
1165                 }
1166 
1167                 /*
1168                  * If we're under lofault protection (copyin etc.),
1169                  * longjmp back to lofault with an EFAULT.
1170                  */
1171                 if (ct->t_lofault) {
1172                         /*
1173                          * Fault is not resolvable, so just return to lofault
1174                          */
1175                         if (lodebug) {
1176                                 showregs(type, rp, addr);
1177                                 traceregs(rp);
1178                         }
1179                         rp->r_r0 = EFAULT;
1180                         rp->r_pc = ct->t_lofault;
1181                         goto cleanup;
1182                 }
1183 
1184                 /*
1185                  * We fall through to the next case, which repeats
1186                  * the OT_SEGMENT_ACCESS check which we've already
1187                  * done, so we'll always fall through to the
1188                  * T_STKFLT case.
1189                  */
1190                 /*FALLTHROUGH*/
1191         case T_SEGFLT:  /* segment not present fault */
1192                 /*
1193                  * One example of this is #NP in update_sregs while
1194                  * attempting to update a user segment register
1195                  * that points to a descriptor that is marked not
1196                  * present.
1197                  */
1198                 if (ct->t_ontrap != NULL &&
1199                     ct->t_ontrap->ot_prot & OT_SEGMENT_ACCESS) {
1200                         ct->t_ontrap->ot_trap |= OT_SEGMENT_ACCESS;
1201                         if (tudebug)
1202                                 showregs(type, rp, (caddr_t)0);
1203                         rp->r_pc = ct->t_ontrap->ot_trampoline;
1204                         goto cleanup;
1205                 }
1206                 /*FALLTHROUGH*/
1207         case T_STKFLT:  /* stack fault */
1208         case T_TSSFLT:  /* invalid TSS fault */
1209                 if (tudebug)
1210                         showregs(type, rp, (caddr_t)0);
1211                 if (kern_gpfault(rp))
1212                         (void) die(type, rp, addr, cpuid);
1213                 goto cleanup;
1214 
1215         /*
1216          * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps
1217          * should have no need for them, so we put a stop to it here.
1218          *
1219          * So: not-present fault is ONLY valid for 32-bit processes with
1220          * a private LDT trying to do a system call. Emulate it.
1221          *
1222          * #gp fault is ONLY valid for 32-bit processes also, which DO NOT
1223          * have a private LDT, and are trying to do a system call. Emulate it.
1224          */
1225 
1226         case T_SEGFLT + USER:   /* segment not present fault */
1227         case T_GPFLT + USER:    /* general protection violation */
1228 #ifdef _SYSCALL32_IMPL
1229                 if (p->p_model != DATAMODEL_NATIVE) {
1230 #endif /* _SYSCALL32_IMPL */
1231                 if (instr_is_lcall_syscall((caddr_t)rp->r_pc)) {
1232                         if (type == T_SEGFLT + USER)
1233                                 ASSERT(p->p_ldt != NULL);
1234 
1235                         if ((p->p_ldt == NULL && type == T_GPFLT + USER) ||
1236                             type == T_SEGFLT + USER) {
1237 
1238                         /*
1239                          * The user attempted a system call via the obsolete
1240                          * call gate mechanism. Because the process doesn't have
1241                          * an LDT (i.e. the ldtr contains 0), a #gp results.
1242                          * Emulate the syscall here, just as we do above for a
1243                          * #np trap.
1244                          */
1245 
1246                         /*
1247                          * Since this is a not-present trap, rp->r_pc points to
1248                          * the trapping lcall instruction. We need to bump it
1249                          * to the next insn so the app can continue on.
1250                          */
1251                         rp->r_pc += LCALLSIZE;
1252                         lwp->lwp_regs = rp;
1253 
1254                         /*
1255                          * Normally the microstate of the LWP is forced back to
1256                          * LMS_USER by the syscall handlers. Emulate that
1257                          * behavior here.
1258                          */
1259                         mstate = LMS_USER;
1260 
1261                         dosyscall();
1262                         goto out;
1263                         }
1264                 }
1265 #ifdef _SYSCALL32_IMPL
1266                 }
1267 #endif /* _SYSCALL32_IMPL */
1268                 /*
1269                  * If the current process is using a private LDT and the
1270                  * trapping instruction is sysenter, the sysenter instruction
1271                  * has been disabled on the CPU because it destroys segment
1272                  * registers. If this is the case, rewrite the instruction to
1273                  * be a safe system call and retry it. If this occurs on a CPU
1274                  * which doesn't even support sysenter, the result of all of
1275                  * this will be to emulate that particular instruction.
1276                  */
1277                 if (p->p_ldt != NULL &&
1278                     ldt_rewrite_syscall(rp, p, X86FSET_SEP))
1279                         goto out;
1280 
1281                 /*FALLTHROUGH*/
1282 
1283         case T_BOUNDFLT + USER: /* bound fault */
1284         case T_STKFLT + USER:   /* stack fault */
1285         case T_TSSFLT + USER:   /* invalid TSS fault */
1286                 if (tudebug)
1287                         showregs(type, rp, (caddr_t)0);
1288                 siginfo.si_signo = SIGSEGV;
1289                 siginfo.si_code  = SEGV_MAPERR;
1290                 siginfo.si_addr  = (caddr_t)rp->r_pc;
1291                 fault = FLTBOUNDS;
1292                 break;
1293 
1294         case T_ALIGNMENT + USER:        /* user alignment error (486) */
1295                 if (tudebug)
1296                         showregs(type, rp, (caddr_t)0);
1297                 bzero(&siginfo, sizeof (siginfo));
1298                 siginfo.si_signo = SIGBUS;
1299                 siginfo.si_code = BUS_ADRALN;
1300                 siginfo.si_addr = (caddr_t)rp->r_pc;
1301                 fault = FLTACCESS;
1302                 break;
1303 
1304         case T_SGLSTP + USER: /* single step/hw breakpoint exception */
1305                 if (tudebug && tudebugbpt)
1306                         showregs(type, rp, (caddr_t)0);
1307 
1308                 /* Was it single-stepping? */
1309                 if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) {
1310                         pcb_t *pcb = &lwp->lwp_pcb;
1311 
1312                         rp->r_ps &= ~PS_T;
1313                         /*
1314                          * If both NORMAL_STEP and WATCH_STEP are in effect,
1315                          * give precedence to WATCH_STEP.  If neither is set,
1316                          * user must have set the PS_T bit in %efl; treat this
1317                          * as NORMAL_STEP.
1318                          */
1319                         if ((fault = undo_watch_step(&siginfo)) == 0 &&
1320                             ((pcb->pcb_flags & NORMAL_STEP) ||
1321                             !(pcb->pcb_flags & WATCH_STEP))) {
1322                                 siginfo.si_signo = SIGTRAP;
1323                                 siginfo.si_code = TRAP_TRACE;
1324                                 siginfo.si_addr = (caddr_t)rp->r_pc;
1325                                 fault = FLTTRACE;
1326                         }
1327                         pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP);
1328                 }
1329                 break;
1330 
1331         case T_BPTFLT + USER:   /* breakpoint trap */
1332                 if (tudebug && tudebugbpt)
1333                         showregs(type, rp, (caddr_t)0);
1334                 /*
1335                  * int 3 (the breakpoint instruction) leaves the pc referring
1336                  * to the address one byte after the breakpointed address.
1337                  * If the P_PR_BPTADJ flag has been set via /proc, We adjust
1338                  * it back so it refers to the breakpointed address.
1339                  */
1340                 if (p->p_proc_flag & P_PR_BPTADJ)
1341                         rp->r_pc--;
1342                 siginfo.si_signo = SIGTRAP;
1343                 siginfo.si_code  = TRAP_BRKPT;
1344                 siginfo.si_addr  = (caddr_t)rp->r_pc;
1345                 fault = FLTBPT;
1346                 break;
1347 
1348         case T_AST:
1349                 /*
1350                  * This occurs only after the cs register has been made to
1351                  * look like a kernel selector, either through debugging or
1352                  * possibly by functions like setcontext().  The thread is
1353                  * about to cause a general protection fault at common_iret()
1354                  * in locore.  We let that happen immediately instead of
1355                  * doing the T_AST processing.
1356                  */
1357                 goto cleanup;
1358 
1359         case T_AST + USER:      /* profiling, resched, h/w error pseudo trap */
1360                 if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) {
1361                         proc_t *p = ttoproc(curthread);
1362                         extern void print_msg_hwerr(ctid_t ct_id, proc_t *p);
1363 
1364                         lwp->lwp_pcb.pcb_flags &= ~ASYNC_HWERR;
1365                         print_msg_hwerr(p->p_ct_process->conp_contract.ct_id,
1366                             p);
1367                         contract_process_hwerr(p->p_ct_process, p);
1368                         siginfo.si_signo = SIGKILL;
1369                         siginfo.si_code = SI_NOINFO;
1370                 } else if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) {
1371                         lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW;
1372                         if (kcpc_overflow_ast()) {
1373                                 /*
1374                                  * Signal performance counter overflow
1375                                  */
1376                                 if (tudebug)
1377                                         showregs(type, rp, (caddr_t)0);
1378                                 bzero(&siginfo, sizeof (siginfo));
1379                                 siginfo.si_signo = SIGEMT;
1380                                 siginfo.si_code = EMT_CPCOVF;
1381                                 siginfo.si_addr = (caddr_t)rp->r_pc;
1382                                 fault = FLTCPCOVF;
1383                         }
1384                 }
1385 
1386                 break;
1387         }
1388 
1389         /*
1390          * We can't get here from a system trap
1391          */
1392         ASSERT(type & USER);
1393 
1394         if (fault) {
1395                 /* We took a fault so abort single step. */
1396                 lwp->lwp_pcb.pcb_flags &= ~(NORMAL_STEP|WATCH_STEP);
1397                 /*
1398                  * Remember the fault and fault adddress
1399                  * for real-time (SIGPROF) profiling.
1400                  */
1401                 lwp->lwp_lastfault = fault;
1402                 lwp->lwp_lastfaddr = siginfo.si_addr;
1403 
1404                 DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo);
1405 
1406                 /*
1407                  * If a debugger has declared this fault to be an
1408                  * event of interest, stop the lwp.  Otherwise just
1409                  * deliver the associated signal.
1410                  */
1411                 if (siginfo.si_signo != SIGKILL &&
1412                     prismember(&p->p_fltmask, fault) &&
1413                     stop_on_fault(fault, &siginfo) == 0)
1414                         siginfo.si_signo = 0;
1415         }
1416 
1417         if (siginfo.si_signo)
1418                 trapsig(&siginfo, (fault != FLTFPE && fault != FLTCPCOVF));
1419 
1420         if (lwp->lwp_oweupc)
1421                 profil_tick(rp->r_pc);
1422 
1423         if (ct->t_astflag | ct->t_sig_check) {
1424                 /*
1425                  * Turn off the AST flag before checking all the conditions that
1426                  * may have caused an AST.  This flag is on whenever a signal or
1427                  * unusual condition should be handled after the next trap or
1428                  * syscall.
1429                  */
1430                 astoff(ct);
1431                 /*
1432                  * If a single-step trap occurred on a syscall (see above)
1433                  * recognize it now.  Do this before checking for signals
1434                  * because deferred_singlestep_trap() may generate a SIGTRAP to
1435                  * the LWP or may otherwise mark the LWP to call issig(FORREAL).
1436                  */
1437                 if (lwp->lwp_pcb.pcb_flags & DEBUG_PENDING)
1438                         deferred_singlestep_trap((caddr_t)rp->r_pc);
1439 
1440                 ct->t_sig_check = 0;
1441 
1442                 mutex_enter(&p->p_lock);
1443                 if (curthread->t_proc_flag & TP_CHANGEBIND) {
1444                         timer_lwpbind();
1445                         curthread->t_proc_flag &= ~TP_CHANGEBIND;
1446                 }
1447                 mutex_exit(&p->p_lock);
1448 
1449                 /*
1450                  * for kaio requests that are on the per-process poll queue,
1451                  * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel
1452                  * should copyout their result_t to user memory. by copying
1453                  * out the result_t, the user can poll on memory waiting
1454                  * for the kaio request to complete.
1455                  */
1456                 if (p->p_aio)
1457                         aio_cleanup(0);
1458                 /*
1459                  * If this LWP was asked to hold, call holdlwp(), which will
1460                  * stop.  holdlwps() sets this up and calls pokelwps() which
1461                  * sets the AST flag.
1462                  *
1463                  * Also check TP_EXITLWP, since this is used by fresh new LWPs
1464                  * through lwp_rtt().  That flag is set if the lwp_create(2)
1465                  * syscall failed after creating the LWP.
1466                  */
1467                 if (ISHOLD(p))
1468                         holdlwp();
1469 
1470                 /*
1471                  * All code that sets signals and makes ISSIG evaluate true must
1472                  * set t_astflag afterwards.
1473                  */
1474                 if (ISSIG_PENDING(ct, lwp, p)) {
1475                         if (issig(FORREAL))
1476                                 psig();
1477                         ct->t_sig_check = 1;
1478                 }
1479 
1480                 if (ct->t_rprof != NULL) {
1481                         realsigprof(0, 0, 0);
1482                         ct->t_sig_check = 1;
1483                 }
1484 
1485                 /*
1486                  * /proc can't enable/disable the trace bit itself
1487                  * because that could race with the call gate used by
1488                  * system calls via "lcall". If that happened, an
1489                  * invalid EFLAGS would result. prstep()/prnostep()
1490                  * therefore schedule an AST for the purpose.
1491                  */
1492                 if (lwp->lwp_pcb.pcb_flags & REQUEST_STEP) {
1493                         lwp->lwp_pcb.pcb_flags &= ~REQUEST_STEP;
1494                         rp->r_ps |= PS_T;
1495                 }
1496                 if (lwp->lwp_pcb.pcb_flags & REQUEST_NOSTEP) {
1497                         lwp->lwp_pcb.pcb_flags &= ~REQUEST_NOSTEP;
1498                         rp->r_ps &= ~PS_T;
1499                 }
1500         }
1501 
1502 out:    /* We can't get here from a system trap */
1503         ASSERT(type & USER);
1504 
1505         if (ISHOLD(p))
1506                 holdlwp();
1507 
1508         /*
1509          * Set state to LWP_USER here so preempt won't give us a kernel
1510          * priority if it occurs after this point.  Call CL_TRAPRET() to
1511          * restore the user-level priority.
1512          *
1513          * It is important that no locks (other than spinlocks) be entered
1514          * after this point before returning to user mode (unless lwp_state
1515          * is set back to LWP_SYS).
1516          */
1517         lwp->lwp_state = LWP_USER;
1518 
1519         if (ct->t_trapret) {
1520                 ct->t_trapret = 0;
1521                 thread_lock(ct);
1522                 CL_TRAPRET(ct);
1523                 thread_unlock(ct);
1524         }
1525         if (CPU->cpu_runrun || curthread->t_schedflag & TS_ANYWAITQ)
1526                 preempt();
1527         prunstop();
1528         (void) new_mstate(ct, mstate);
1529 
1530         /* Kernel probe */
1531         TNF_PROBE_1(thread_state, "thread", /* CSTYLED */,
1532             tnf_microstate, state, LMS_USER);
1533 
1534         return;
1535 
1536 cleanup:        /* system traps end up here */
1537         ASSERT(!(type & USER));
1538 }
1539 
1540 /*
1541  * Patch non-zero to disable preemption of threads in the kernel.
1542  */
1543 int IGNORE_KERNEL_PREEMPTION = 0;       /* XXX - delete this someday */
1544 
1545 struct kpreempt_cnts {          /* kernel preemption statistics */
1546         int     kpc_idle;       /* executing idle thread */
1547         int     kpc_intr;       /* executing interrupt thread */
1548         int     kpc_clock;      /* executing clock thread */
1549         int     kpc_blocked;    /* thread has blocked preemption (t_preempt) */
1550         int     kpc_notonproc;  /* thread is surrendering processor */
1551         int     kpc_inswtch;    /* thread has ratified scheduling decision */
1552         int     kpc_prilevel;   /* processor interrupt level is too high */
1553         int     kpc_apreempt;   /* asynchronous preemption */
1554         int     kpc_spreempt;   /* synchronous preemption */
1555 } kpreempt_cnts;
1556 
1557 /*
1558  * kernel preemption: forced rescheduling, preempt the running kernel thread.
1559  *      the argument is old PIL for an interrupt,
1560  *      or the distingished value KPREEMPT_SYNC.
1561  */
1562 void
1563 kpreempt(int asyncspl)
1564 {
1565         kthread_t *ct = curthread;
1566 
1567         if (IGNORE_KERNEL_PREEMPTION) {
1568                 aston(CPU->cpu_dispthread);
1569                 return;
1570         }
1571 
1572         /*
1573          * Check that conditions are right for kernel preemption
1574          */
1575         do {
1576                 if (ct->t_preempt) {
1577                         /*
1578                          * either a privileged thread (idle, panic, interrupt)
1579                          * or will check when t_preempt is lowered
1580                          * We need to specifically handle the case where
1581                          * the thread is in the middle of swtch (resume has
1582                          * been called) and has its t_preempt set
1583                          * [idle thread and a thread which is in kpreempt
1584                          * already] and then a high priority thread is
1585                          * available in the local dispatch queue.
1586                          * In this case the resumed thread needs to take a
1587                          * trap so that it can call kpreempt. We achieve
1588                          * this by using siron().
1589                          * How do we detect this condition:
1590                          * idle thread is running and is in the midst of
1591                          * resume: curthread->t_pri == -1 && CPU->dispthread
1592                          * != CPU->thread
1593                          * Need to ensure that this happens only at high pil
1594                          * resume is called at high pil
1595                          * Only in resume_from_idle is the pil changed.
1596                          */
1597                         if (ct->t_pri < 0) {
1598                                 kpreempt_cnts.kpc_idle++;
1599                                 if (CPU->cpu_dispthread != CPU->cpu_thread)
1600                                         siron();
1601                         } else if (ct->t_flag & T_INTR_THREAD) {
1602                                 kpreempt_cnts.kpc_intr++;
1603                                 if (ct->t_pil == CLOCK_LEVEL)
1604                                         kpreempt_cnts.kpc_clock++;
1605                         } else {
1606                                 kpreempt_cnts.kpc_blocked++;
1607                                 if (CPU->cpu_dispthread != CPU->cpu_thread)
1608                                         siron();
1609                         }
1610                         aston(CPU->cpu_dispthread);
1611                         return;
1612                 }
1613                 if (ct->t_state != TS_ONPROC ||
1614                     ct->t_disp_queue != CPU->cpu_disp) {
1615                         /* this thread will be calling swtch() shortly */
1616                         kpreempt_cnts.kpc_notonproc++;
1617                         if (CPU->cpu_thread != CPU->cpu_dispthread) {
1618                                 /* already in swtch(), force another */
1619                                 kpreempt_cnts.kpc_inswtch++;
1620                                 siron();
1621                         }
1622                         return;
1623                 }
1624                 if (getpil() >= DISP_LEVEL) {
1625                         /*
1626                          * We can't preempt this thread if it is at
1627                          * a PIL >= DISP_LEVEL since it may be holding
1628                          * a spin lock (like sched_lock).
1629                          */
1630                         siron();        /* check back later */
1631                         kpreempt_cnts.kpc_prilevel++;
1632                         return;
1633                 }
1634                 if (!interrupts_enabled()) {
1635                         /*
1636                          * Can't preempt while running with ints disabled
1637                          */
1638                         kpreempt_cnts.kpc_prilevel++;
1639                         return;
1640                 }
1641                 if (asyncspl != KPREEMPT_SYNC)
1642                         kpreempt_cnts.kpc_apreempt++;
1643                 else
1644                         kpreempt_cnts.kpc_spreempt++;
1645 
1646                 ct->t_preempt++;
1647                 preempt();
1648                 ct->t_preempt--;
1649         } while (CPU->cpu_kprunrun);
1650 }
1651 
1652 /*
1653  * Print out debugging info.
1654  */
1655 static void
1656 showregs(uint_t type, struct regs *rp, caddr_t addr)
1657 {
1658         int s;
1659 
1660         s = spl7();
1661         type &= ~USER;
1662         if (PTOU(curproc)->u_comm[0])
1663                 printf("%s: ", PTOU(curproc)->u_comm);
1664         if (type < TRAP_TYPES)
1665                 printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]);
1666         else
1667                 switch (type) {
1668                 case T_SYSCALL:
1669                         printf("Syscall Trap:\n");
1670                         break;
1671                 case T_AST:
1672                         printf("AST\n");
1673                         break;
1674                 default:
1675                         printf("Bad Trap = %d\n", type);
1676                         break;
1677                 }
1678         if (type == T_PGFLT) {
1679                 printf("Bad %s fault at addr=0x%lx\n",
1680                     USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr);
1681         } else if (addr) {
1682                 printf("addr=0x%lx\n", (uintptr_t)addr);
1683         }
1684 
1685         printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n",
1686             (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ?
1687             ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps);
1688 
1689 #if defined(__lint)
1690         /*
1691          * this clause can be deleted when lint bug 4870403 is fixed
1692          * (lint thinks that bit 32 is illegal in a %b format string)
1693          */
1694         printf("cr0: %x cr4: %b\n",
1695             (uint_t)getcr0(), (uint_t)getcr4(), FMT_CR4);
1696 #else
1697         printf("cr0: %b cr4: %b\n",
1698             (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4);
1699 #endif  /* __lint */
1700 
1701         printf("cr2: %lx", getcr2());
1702 #if !defined(__xpv)
1703         printf("cr3: %lx", getcr3());
1704 #if defined(__amd64)
1705         printf("cr8: %lx\n", getcr8());
1706 #endif
1707 #endif
1708         printf("\n");
1709 
1710         dumpregs(rp);
1711         splx(s);
1712 }
1713 
1714 static void
1715 dumpregs(struct regs *rp)
1716 {
1717 #if defined(__amd64)
1718         const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n";
1719 
1720         printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx);
1721         printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9);
1722         printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp);
1723         printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12);
1724         printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15);
1725 
1726         printf(fmt, "fsb", rdmsr(MSR_AMD_FSBASE), "gsb", rdmsr(MSR_AMD_GSBASE),
1727             " ds", rp->r_ds);
1728         printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs);
1729 
1730         printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip);
1731         printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp);
1732 
1733         printf("\t%3s: %16lx\n", " ss", rp->r_ss);
1734 
1735 #elif defined(__i386)
1736         const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n";
1737 
1738         printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs,
1739             " es", rp->r_es, " ds", rp->r_ds);
1740         printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi,
1741             "ebp", rp->r_ebp, "esp", rp->r_esp);
1742         printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx,
1743             "ecx", rp->r_ecx, "eax", rp->r_eax);
1744         printf(fmt, "trp", rp->r_trapno, "err", rp->r_err,
1745             "eip", rp->r_eip, " cs", rp->r_cs);
1746         printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n",
1747             "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss);
1748 
1749 #endif  /* __i386 */
1750 }
1751 
1752 /*
1753  * Test to see if the instruction is iret on i386 or iretq on amd64.
1754  *
1755  * On the hypervisor we can only test for nopop_sys_rtt_syscall. If true
1756  * then we are in the context of hypervisor's failsafe handler because it
1757  * tried to iret and failed due to a bad selector. See xen_failsafe_callback.
1758  */
1759 static int
1760 instr_is_iret(caddr_t pc)
1761 {
1762 
1763 #if defined(__xpv)
1764         extern void nopop_sys_rtt_syscall(void);
1765         return ((pc == (caddr_t)nopop_sys_rtt_syscall) ? 1 : 0);
1766 
1767 #else
1768 
1769 #if defined(__amd64)
1770         static const uint8_t iret_insn[2] = { 0x48, 0xcf };     /* iretq */
1771 
1772 #elif defined(__i386)
1773         static const uint8_t iret_insn[1] = { 0xcf };           /* iret */
1774 #endif  /* __i386 */
1775         return (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0);
1776 
1777 #endif  /* __xpv */
1778 }
1779 
1780 #if defined(__i386)
1781 
1782 /*
1783  * Test to see if the instruction is part of __SEGREGS_POP
1784  *
1785  * Note carefully the appallingly awful dependency between
1786  * the instruction sequence used in __SEGREGS_POP and these
1787  * instructions encoded here.
1788  */
1789 static int
1790 instr_is_segregs_pop(caddr_t pc)
1791 {
1792         static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 };
1793         static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 };
1794         static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 };
1795         static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc };
1796 
1797         if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 ||
1798             bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 ||
1799             bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 ||
1800             bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0)
1801                 return (1);
1802 
1803         return (0);
1804 }
1805 
1806 #endif  /* __i386 */
1807 
1808 /*
1809  * Test to see if the instruction is part of _sys_rtt.
1810  *
1811  * Again on the hypervisor if we try to IRET to user land with a bad code
1812  * or stack selector we will get vectored through xen_failsafe_callback.
1813  * In which case we assume we got here via _sys_rtt since we only allow
1814  * IRET to user land to take place in _sys_rtt.
1815  */
1816 static int
1817 instr_is_sys_rtt(caddr_t pc)
1818 {
1819         extern void _sys_rtt(), _sys_rtt_end();
1820 
1821         if ((uintptr_t)pc < (uintptr_t)_sys_rtt ||
1822             (uintptr_t)pc > (uintptr_t)_sys_rtt_end)
1823                 return (0);
1824 
1825         return (1);
1826 }
1827 
1828 /*
1829  * Handle #gp faults in kernel mode.
1830  *
1831  * One legitimate way this can happen is if we attempt to update segment
1832  * registers to naughty values on the way out of the kernel.
1833  *
1834  * This can happen in a couple of ways: someone - either accidentally or
1835  * on purpose - creates (setcontext(2), lwp_create(2)) or modifies
1836  * (signal(2)) a ucontext that contains silly segment register values.
1837  * Or someone - either accidentally or on purpose - modifies the prgregset_t
1838  * of a subject process via /proc to contain silly segment register values.
1839  *
1840  * (The unfortunate part is that we can end up discovering the bad segment
1841  * register value in the middle of an 'iret' after we've popped most of the
1842  * stack.  So it becomes quite difficult to associate an accurate ucontext
1843  * with the lwp, because the act of taking the #gp trap overwrites most of
1844  * what we were going to send the lwp.)
1845  *
1846  * OTOH if it turns out that's -not- the problem, and we're -not- an lwp
1847  * trying to return to user mode and we get a #gp fault, then we need
1848  * to die() -- which will happen if we return non-zero from this routine.
1849  */
1850 static int
1851 kern_gpfault(struct regs *rp)
1852 {
1853         kthread_t *t = curthread;
1854         proc_t *p = ttoproc(t);
1855         klwp_t *lwp = ttolwp(t);
1856         struct regs tmpregs, *trp = NULL;
1857         caddr_t pc = (caddr_t)rp->r_pc;
1858         int v;
1859         uint32_t auditing = AU_AUDITING();
1860 
1861         /*
1862          * if we're not an lwp, or in the case of running native the
1863          * pc range is outside _sys_rtt, then we should immediately
1864          * be die()ing horribly.
1865          */
1866         if (lwp == NULL || !instr_is_sys_rtt(pc))
1867                 return (1);
1868 
1869         /*
1870          * So at least we're in the right part of the kernel.
1871          *
1872          * Disassemble the instruction at the faulting pc.
1873          * Once we know what it is, we carefully reconstruct the stack
1874          * based on the order in which the stack is deconstructed in
1875          * _sys_rtt. Ew.
1876          */
1877         if (instr_is_iret(pc)) {
1878                 /*
1879                  * We took the #gp while trying to perform the IRET.
1880                  * This means that either %cs or %ss are bad.
1881                  * All we know for sure is that most of the general
1882                  * registers have been restored, including the
1883                  * segment registers, and all we have left on the
1884                  * topmost part of the lwp's stack are the
1885                  * registers that the iretq was unable to consume.
1886                  *
1887                  * All the rest of the state was crushed by the #gp
1888                  * which pushed -its- registers atop our old save area
1889                  * (because we had to decrement the stack pointer, sigh) so
1890                  * all that we can try and do is to reconstruct the
1891                  * crushed frame from the #gp trap frame itself.
1892                  */
1893                 trp = &tmpregs;
1894                 trp->r_ss = lwptoregs(lwp)->r_ss;
1895                 trp->r_sp = lwptoregs(lwp)->r_sp;
1896                 trp->r_ps = lwptoregs(lwp)->r_ps;
1897                 trp->r_cs = lwptoregs(lwp)->r_cs;
1898                 trp->r_pc = lwptoregs(lwp)->r_pc;
1899                 bcopy(rp, trp, offsetof(struct regs, r_pc));
1900 
1901                 /*
1902                  * Validate simple math
1903                  */
1904                 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc);
1905                 ASSERT(trp->r_err == rp->r_err);
1906 
1907 
1908 
1909         }
1910 
1911 #if defined(__amd64)
1912         if (trp == NULL && lwp->lwp_pcb.pcb_rupdate != 0) {
1913 
1914                 /*
1915                  * This is the common case -- we're trying to load
1916                  * a bad segment register value in the only section
1917                  * of kernel code that ever loads segment registers.
1918                  *
1919                  * We don't need to do anything at this point because
1920                  * the pcb contains all the pending segment register
1921                  * state, and the regs are still intact because we
1922                  * didn't adjust the stack pointer yet.  Given the fidelity
1923                  * of all this, we could conceivably send a signal
1924                  * to the lwp, rather than core-ing.
1925                  */
1926                 trp = lwptoregs(lwp);
1927                 ASSERT((caddr_t)trp == (caddr_t)rp->r_sp);
1928         }
1929 
1930 #elif defined(__i386)
1931 
1932         if (trp == NULL && instr_is_segregs_pop(pc))
1933                 trp = lwptoregs(lwp);
1934 
1935 #endif  /* __i386 */
1936 
1937         if (trp == NULL)
1938                 return (1);
1939 
1940         /*
1941          * If we get to here, we're reasonably confident that we've
1942          * correctly decoded what happened on the way out of the kernel.
1943          * Rewrite the lwp's registers so that we can create a core dump
1944          * the (at least vaguely) represents the mcontext we were
1945          * being asked to restore when things went so terribly wrong.
1946          */
1947 
1948         /*
1949          * Make sure that we have a meaningful %trapno and %err.
1950          */
1951         trp->r_trapno = rp->r_trapno;
1952         trp->r_err = rp->r_err;
1953 
1954         if ((caddr_t)trp != (caddr_t)lwptoregs(lwp))
1955                 bcopy(trp, lwptoregs(lwp), sizeof (*trp));
1956 
1957 
1958         mutex_enter(&p->p_lock);
1959         lwp->lwp_cursig = SIGSEGV;
1960         mutex_exit(&p->p_lock);
1961 
1962         /*
1963          * Terminate all LWPs but don't discard them.  If another lwp beat
1964          * us to the punch by calling exit(), evaporate now.
1965          */
1966         proc_is_exiting(p);
1967         if (exitlwps(1) != 0) {
1968                 mutex_enter(&p->p_lock);
1969                 lwp_exit();
1970         }
1971 
1972         if (auditing)           /* audit core dump */
1973                 audit_core_start(SIGSEGV);
1974         v = core(SIGSEGV, B_FALSE);
1975         if (auditing)           /* audit core dump */
1976                 audit_core_finish(v ? CLD_KILLED : CLD_DUMPED);
1977         exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV);
1978         return (0);
1979 }
1980 
1981 /*
1982  * dump_tss() - Display the TSS structure
1983  */
1984 
1985 #if !defined(__xpv)
1986 #if defined(__amd64)
1987 
1988 static void
1989 dump_tss(void)
1990 {
1991         const char tss_fmt[] = "tss.%s:\t0x%p\n";  /* Format string */
1992         tss_t *tss = CPU->cpu_tss;
1993 
1994         printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0);
1995         printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1);
1996         printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2);
1997 
1998         printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1);
1999         printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2);
2000         printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3);
2001         printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4);
2002         printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5);
2003         printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6);
2004         printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7);
2005 }
2006 
2007 #elif defined(__i386)
2008 
2009 static void
2010 dump_tss(void)
2011 {
2012         const char tss_fmt[] = "tss.%s:\t0x%p\n";  /* Format string */
2013         tss_t *tss = CPU->cpu_tss;
2014 
2015         printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link);
2016         printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0);
2017         printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0);
2018         printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1);
2019         printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1);
2020         printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2);
2021         printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2);
2022         printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3);
2023         printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip);
2024         printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags);
2025         printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax);
2026         printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx);
2027         printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx);
2028         printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx);
2029         printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp);
2030 }
2031 
2032 #endif  /* __amd64 */
2033 #endif  /* !__xpv */
2034 
2035 #if defined(TRAPTRACE)
2036 
2037 int ttrace_nrec = 10;           /* number of records to dump out */
2038 int ttrace_dump_nregs = 0;      /* dump out this many records with regs too */
2039 
2040 /*
2041  * Dump out the last ttrace_nrec traptrace records on each CPU
2042  */
2043 static void
2044 dump_ttrace(void)
2045 {
2046         trap_trace_ctl_t *ttc;
2047         trap_trace_rec_t *rec;
2048         uintptr_t current;
2049         int i, j, k;
2050         int n = NCPU;
2051 #if defined(__amd64)
2052         const char banner[] =
2053             "\ncpu          address    timestamp "
2054             "type  vc  handler   pc\n";
2055         const char fmt1[] = "%3d %016lx %12llx ";
2056 #elif defined(__i386)
2057         const char banner[] =
2058             "\ncpu  address     timestamp type  vc  handler   pc\n";
2059         const char fmt1[] = "%3d %08lx %12llx ";
2060 #endif
2061         const char fmt2[] = "%4s %3x ";
2062         const char fmt3[] = "%8s ";
2063 
2064         if (ttrace_nrec == 0)
2065                 return;
2066 
2067         printf(banner);
2068 
2069         for (i = 0; i < n; i++) {
2070                 ttc = &trap_trace_ctl[i];
2071                 if (ttc->ttc_first == NULL)
2072                         continue;
2073 
2074                 current = ttc->ttc_next - sizeof (trap_trace_rec_t);
2075                 for (j = 0; j < ttrace_nrec; j++) {
2076                         struct sysent   *sys;
2077                         struct autovec  *vec;
2078                         extern struct av_head autovect[];
2079                         int type;
2080                         ulong_t off;
2081                         char *sym, *stype;
2082 
2083                         if (current < ttc->ttc_first)
2084                                 current =
2085                                     ttc->ttc_limit - sizeof (trap_trace_rec_t);
2086 
2087                         if (current == NULL)
2088                                 continue;
2089 
2090                         rec = (trap_trace_rec_t *)current;
2091 
2092                         if (rec->ttr_stamp == 0)
2093                                 break;
2094 
2095                         printf(fmt1, i, (uintptr_t)rec, rec->ttr_stamp);
2096 
2097                         switch (rec->ttr_marker) {
2098                         case TT_SYSCALL:
2099                         case TT_SYSENTER:
2100                         case TT_SYSC:
2101                         case TT_SYSC64:
2102 #if defined(__amd64)
2103                                 sys = &sysent32[rec->ttr_sysnum];
2104                                 switch (rec->ttr_marker) {
2105                                 case TT_SYSC64:
2106                                         sys = &sysent[rec->ttr_sysnum];
2107                                         /*FALLTHROUGH*/
2108 #elif defined(__i386)
2109                                 sys = &sysent[rec->ttr_sysnum];
2110                                 switch (rec->ttr_marker) {
2111                                 case TT_SYSC64:
2112 #endif
2113                                 case TT_SYSC:
2114                                         stype = "sysc"; /* syscall */
2115                                         break;
2116                                 case TT_SYSCALL:
2117                                         stype = "lcal"; /* lcall */
2118                                         break;
2119                                 case TT_SYSENTER:
2120                                         stype = "syse"; /* sysenter */
2121                                         break;
2122                                 default:
2123                                         break;
2124                                 }
2125                                 printf(fmt2, "sysc", rec->ttr_sysnum);
2126                                 if (sys != NULL) {
2127                                         sym = kobj_getsymname(
2128                                             (uintptr_t)sys->sy_callc,
2129                                             &off);
2130                                         if (sym != NULL)
2131                                                 printf(fmt3, sym);
2132                                         else
2133                                                 printf("%p ", sys->sy_callc);
2134                                 } else {
2135                                         printf(fmt3, "unknown");
2136                                 }
2137                                 break;
2138 
2139                         case TT_INTERRUPT:
2140                                 printf(fmt2, "intr", rec->ttr_vector);
2141                                 if (get_intr_handler != NULL)
2142                                         vec = (struct autovec *)
2143                                             (*get_intr_handler)
2144                                             (rec->ttr_cpuid, rec->ttr_vector);
2145                                 else
2146                                         vec =
2147                                             autovect[rec->ttr_vector].avh_link;
2148 
2149                                 if (vec != NULL) {
2150                                         sym = kobj_getsymname(
2151                                             (uintptr_t)vec->av_vector, &off);
2152                                         if (sym != NULL)
2153                                                 printf(fmt3, sym);
2154                                         else
2155                                                 printf("%p ", vec->av_vector);
2156                                 } else {
2157                                         printf(fmt3, "unknown ");
2158                                 }
2159                                 break;
2160 
2161                         case TT_TRAP:
2162                         case TT_EVENT:
2163                                 type = rec->ttr_regs.r_trapno;
2164                                 printf(fmt2, "trap", type);
2165                                 if (type < TRAP_TYPES)
2166                                         printf("     #%s ",
2167                                             trap_type_mnemonic[type]);
2168                                 else
2169                                         switch (type) {
2170                                         case T_AST:
2171                                                 printf(fmt3, "ast");
2172                                                 break;
2173                                         default:
2174                                                 printf(fmt3, "");
2175                                                 break;
2176                                         }
2177                                 break;
2178 
2179                         default:
2180                                 break;
2181                         }
2182 
2183                         sym = kobj_getsymname(rec->ttr_regs.r_pc, &off);
2184                         if (sym != NULL)
2185                                 printf("%s+%lx\n", sym, off);
2186                         else
2187                                 printf("%lx\n", rec->ttr_regs.r_pc);
2188 
2189                         if (ttrace_dump_nregs-- > 0) {
2190                                 int s;
2191 
2192                                 if (rec->ttr_marker == TT_INTERRUPT)
2193                                         printf(
2194                                             "\t\tipl %x spl %x pri %x\n",
2195                                             rec->ttr_ipl,
2196                                             rec->ttr_spl,
2197                                             rec->ttr_pri);
2198 
2199                                 dumpregs(&rec->ttr_regs);
2200 
2201                                 printf("\t%3s: %p\n\n", " ct",
2202                                     (void *)rec->ttr_curthread);
2203 
2204                                 /*
2205                                  * print out the pc stack that we recorded
2206                                  * at trap time (if any)
2207                                  */
2208                                 for (s = 0; s < rec->ttr_sdepth; s++) {
2209                                         uintptr_t fullpc;
2210 
2211                                         if (s >= TTR_STACK_DEPTH) {
2212                                                 printf("ttr_sdepth corrupt\n");
2213                                                 break;
2214                                         }
2215 
2216                                         fullpc = (uintptr_t)rec->ttr_stack[s];
2217 
2218                                         sym = kobj_getsymname(fullpc, &off);
2219                                         if (sym != NULL)
2220                                                 printf("-> %s+0x%lx()\n",
2221                                                     sym, off);
2222                                         else
2223                                                 printf("-> 0x%lx()\n", fullpc);
2224                                 }
2225                                 printf("\n");
2226                         }
2227                         current -= sizeof (trap_trace_rec_t);
2228                 }
2229         }
2230 }
2231 
2232 #endif  /* TRAPTRACE */
2233 
2234 void
2235 panic_showtrap(struct panic_trap_info *tip)
2236 {
2237         showregs(tip->trap_type, tip->trap_regs, tip->trap_addr);
2238 
2239 #if defined(TRAPTRACE)
2240         dump_ttrace();
2241 #endif
2242 
2243 #if !defined(__xpv)
2244         if (tip->trap_type == T_DBLFLT)
2245                 dump_tss();
2246 #endif
2247 }
2248 
2249 void
2250 panic_savetrap(panic_data_t *pdp, struct panic_trap_info *tip)
2251 {
2252         panic_saveregs(pdp, tip->trap_regs);
2253 }