44 static void local_apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1);
45 static uint64_t local_x2apic_read(uint32_t msr);
46 static void local_x2apic_write(uint32_t msr, uint64_t value);
47 static int get_local_x2apic_pri(void);
48 static void local_x2apic_write_task_reg(uint64_t value);
49 static void local_x2apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1);
50
51 /*
52 * According to the X2APIC specification:
53 *
54 * xAPIC global enable X2APIC enable Description
55 * (IA32_APIC_BASE[11]) (IA32_APIC_BASE[10])
56 * -----------------------------------------------------------
57 * 0 0 APIC is disabled
58 * 0 1 Invalid
59 * 1 0 APIC is enabled in xAPIC mode
60 * 1 1 APIC is enabled in X2APIC mode
61 * -----------------------------------------------------------
62 */
63 int x2apic_enable = 1;
64 int apic_mode = LOCAL_APIC; /* Default mode is Local APIC */
65
66 /* Uses MMIO (Memory Mapped IO) */
67 static apic_reg_ops_t local_apic_regs_ops = {
68 local_apic_read,
69 local_apic_write,
70 get_local_apic_pri,
71 local_apic_write_task_reg,
72 local_apic_write_int_cmd,
73 apic_send_EOI,
74 };
75
76 /* X2APIC : Uses RDMSR/WRMSR instructions to access APIC registers */
77 static apic_reg_ops_t x2apic_regs_ops = {
78 local_x2apic_read,
79 local_x2apic_write,
80 get_local_x2apic_pri,
81 local_x2apic_write_task_reg,
82 local_x2apic_write_int_cmd,
83 apic_send_EOI,
84 };
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44 static void local_apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1);
45 static uint64_t local_x2apic_read(uint32_t msr);
46 static void local_x2apic_write(uint32_t msr, uint64_t value);
47 static int get_local_x2apic_pri(void);
48 static void local_x2apic_write_task_reg(uint64_t value);
49 static void local_x2apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1);
50
51 /*
52 * According to the X2APIC specification:
53 *
54 * xAPIC global enable X2APIC enable Description
55 * (IA32_APIC_BASE[11]) (IA32_APIC_BASE[10])
56 * -----------------------------------------------------------
57 * 0 0 APIC is disabled
58 * 0 1 Invalid
59 * 1 0 APIC is enabled in xAPIC mode
60 * 1 1 APIC is enabled in X2APIC mode
61 * -----------------------------------------------------------
62 */
63 int x2apic_enable = 1;
64 enum apic_mode apic_mode = LOCAL_APIC; /* Default mode is Local APIC */
65
66 /* Uses MMIO (Memory Mapped IO) */
67 static apic_reg_ops_t local_apic_regs_ops = {
68 local_apic_read,
69 local_apic_write,
70 get_local_apic_pri,
71 local_apic_write_task_reg,
72 local_apic_write_int_cmd,
73 apic_send_EOI,
74 };
75
76 /* X2APIC : Uses RDMSR/WRMSR instructions to access APIC registers */
77 static apic_reg_ops_t x2apic_regs_ops = {
78 local_x2apic_read,
79 local_x2apic_write,
80 get_local_x2apic_pri,
81 local_x2apic_write_task_reg,
82 local_x2apic_write_int_cmd,
83 apic_send_EOI,
84 };
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