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6659 nvlist_free(NULL) is a no-op
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--- old/usr/src/uts/intel/io/intel_nhm/dimm_topo.c
+++ new/usr/src/uts/intel/io/intel_nhm/dimm_topo.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 #include <sys/types.h>
28 28 #include <sys/time.h>
29 29 #include <sys/nvpair.h>
30 30 #include <sys/cmn_err.h>
31 31 #include <sys/cred.h>
32 32 #include <sys/open.h>
33 33 #include <sys/ddi.h>
34 34 #include <sys/sunddi.h>
35 35 #include <sys/conf.h>
36 36 #include <sys/modctl.h>
37 37 #include <sys/cyclic.h>
38 38 #include <sys/errorq.h>
39 39 #include <sys/stat.h>
40 40 #include <sys/cpuvar.h>
41 41 #include <sys/mc_intel.h>
42 42 #include <sys/mc.h>
43 43 #include <sys/fm/protocol.h>
44 44 #include "nhm_log.h"
45 45 #include "intel_nhm.h"
46 46
47 47 extern nvlist_t *inhm_mc_nvl[MAX_CPU_NODES];
48 48 extern char closed_page;
49 49 extern char ecc_enabled;
50 50 extern char lockstep[MAX_CPU_NODES];
51 51 extern char mirror_mode[MAX_CPU_NODES];
52 52 extern char spare_channel[MAX_CPU_NODES];
53 53
54 54 static void
55 55 inhm_vrank(nvlist_t *vrank, int num, uint64_t dimm_base, uint64_t limit,
56 56 uint32_t sinterleave, uint32_t cinterleave, uint32_t rinterleave,
57 57 uint32_t sway, uint32_t cway, uint32_t rway)
58 58 {
59 59 char buf[128];
60 60
61 61 (void) snprintf(buf, sizeof (buf), "dimm-rank-base-%d", num);
62 62 (void) nvlist_add_uint64(vrank, buf, dimm_base);
63 63 (void) snprintf(buf, sizeof (buf), "dimm-rank-limit-%d", num);
64 64 (void) nvlist_add_uint64(vrank, buf, dimm_base + limit);
65 65 if (sinterleave > 1) {
66 66 (void) snprintf(buf, sizeof (buf), "dimm-socket-interleave-%d",
67 67 num);
68 68 (void) nvlist_add_uint32(vrank, buf, sinterleave);
69 69 (void) snprintf(buf, sizeof (buf),
70 70 "dimm-socket-interleave-way-%d", num);
71 71 (void) nvlist_add_uint32(vrank, buf, sway);
72 72 }
73 73 if (cinterleave > 1) {
74 74 (void) snprintf(buf, sizeof (buf), "dimm-channel-interleave-%d",
75 75 num);
76 76 (void) nvlist_add_uint32(vrank, buf, cinterleave);
77 77 (void) snprintf(buf, sizeof (buf),
78 78 "dimm-channel-interleave-way-%d", num);
79 79 (void) nvlist_add_uint32(vrank, buf, cway);
80 80 }
81 81 if (rinterleave > 1) {
82 82 (void) snprintf(buf, sizeof (buf), "dimm-rank-interleave-%d",
83 83 num);
84 84 (void) nvlist_add_uint32(vrank, buf, rinterleave);
85 85 (void) snprintf(buf, sizeof (buf),
86 86 "dimm-rank-interleave-way-%d", num);
87 87 (void) nvlist_add_uint32(vrank, buf, rway);
88 88 }
89 89 }
90 90
91 91 static void
92 92 inhm_rank(nvlist_t *newdimm, nhm_dimm_t *nhm_dimm, uint32_t node,
93 93 uint8_t channel, uint32_t dimm, uint64_t rank_size)
94 94 {
95 95 nvlist_t **newrank;
96 96 int num;
97 97 int i;
98 98 uint64_t dimm_base;
99 99 uint64_t vrank_sz;
100 100 uint64_t rank_addr;
101 101 uint64_t pa;
102 102 uint32_t sinterleave, cinterleave, rinterleave;
103 103 uint32_t sway, cway, rway;
104 104
105 105 newrank = kmem_zalloc(sizeof (nvlist_t *) * nhm_dimm->nranks, KM_SLEEP);
106 106 for (i = 0; i < nhm_dimm->nranks; i++) {
107 107 (void) nvlist_alloc(&newrank[i], NV_UNIQUE_NAME, KM_SLEEP);
108 108 rank_addr = 0;
109 109 num = 0;
110 110 while (rank_addr < rank_size) {
111 111 pa = dimm_to_addr(node, channel, dimm * 4 + i,
112 112 rank_addr, &dimm_base, &vrank_sz, &sinterleave,
113 113 &cinterleave, &rinterleave, &sway, &cway, &rway);
114 114 if (pa == -1 || vrank_sz == 0)
115 115 break;
116 116 inhm_vrank(newrank[i], num, dimm_base,
117 117 vrank_sz * sinterleave * cinterleave * rinterleave,
118 118 sinterleave, cinterleave, rinterleave, sway, cway,
119 119 rway);
120 120 rank_addr += vrank_sz;
121 121 num++;
122 122 }
123 123
124 124 }
125 125 (void) nvlist_add_nvlist_array(newdimm, MCINTEL_NVLIST_RANKS, newrank,
126 126 nhm_dimm->nranks);
127 127 for (i = 0; i < nhm_dimm->nranks; i++)
128 128 nvlist_free(newrank[i]);
129 129 kmem_free(newrank, sizeof (nvlist_t *) * nhm_dimm->nranks);
130 130 }
131 131
132 132 static nvlist_t *
133 133 inhm_dimm(nhm_dimm_t *nhm_dimm, uint32_t node, uint8_t channel, uint32_t dimm)
134 134 {
135 135 nvlist_t *newdimm;
136 136 uint8_t t;
137 137 char sbuf[65];
138 138
139 139 (void) nvlist_alloc(&newdimm, NV_UNIQUE_NAME, KM_SLEEP);
140 140 (void) nvlist_add_uint32(newdimm, "dimm-number", dimm);
141 141
142 142 if (nhm_dimm->dimm_size >= 1024*1024*1024) {
143 143 (void) snprintf(sbuf, sizeof (sbuf), "%dG",
144 144 (int)(nhm_dimm->dimm_size / (1024*1024*1024)));
145 145 } else {
146 146 (void) snprintf(sbuf, sizeof (sbuf), "%dM",
147 147 (int)(nhm_dimm->dimm_size / (1024*1024)));
148 148 }
149 149 (void) nvlist_add_string(newdimm, "dimm-size", sbuf);
150 150 (void) nvlist_add_uint64(newdimm, "size", nhm_dimm->dimm_size);
151 151 (void) nvlist_add_uint32(newdimm, "nbanks", (uint32_t)nhm_dimm->nbanks);
152 152 (void) nvlist_add_uint32(newdimm, "ncolumn",
153 153 (uint32_t)nhm_dimm->ncolumn);
154 154 (void) nvlist_add_uint32(newdimm, "nrow", (uint32_t)nhm_dimm->nrow);
155 155 (void) nvlist_add_uint32(newdimm, "width", (uint32_t)nhm_dimm->width);
156 156 (void) nvlist_add_uint32(newdimm, "ranks", (uint32_t)nhm_dimm->nranks);
157 157 inhm_rank(newdimm, nhm_dimm, node, channel, dimm,
158 158 nhm_dimm->dimm_size / nhm_dimm->nranks);
159 159 if (nhm_dimm->manufacturer && nhm_dimm->manufacturer[0]) {
160 160 t = sizeof (nhm_dimm->manufacturer);
161 161 (void) strncpy(sbuf, nhm_dimm->manufacturer, t);
162 162 sbuf[t] = 0;
163 163 (void) nvlist_add_string(newdimm, "manufacturer", sbuf);
164 164 }
165 165 if (nhm_dimm->serial_number && nhm_dimm->serial_number[0]) {
166 166 t = sizeof (nhm_dimm->serial_number);
167 167 (void) strncpy(sbuf, nhm_dimm->serial_number, t);
168 168 sbuf[t] = 0;
169 169 (void) nvlist_add_string(newdimm, FM_FMRI_HC_SERIAL_ID, sbuf);
170 170 }
171 171 if (nhm_dimm->part_number && nhm_dimm->part_number[0]) {
172 172 t = sizeof (nhm_dimm->part_number);
173 173 (void) strncpy(sbuf, nhm_dimm->part_number, t);
174 174 sbuf[t] = 0;
175 175 (void) nvlist_add_string(newdimm, FM_FMRI_HC_PART, sbuf);
176 176 }
177 177 if (nhm_dimm->revision && nhm_dimm->revision[0]) {
178 178 t = sizeof (nhm_dimm->revision);
179 179 (void) strncpy(sbuf, nhm_dimm->revision, t);
180 180 sbuf[t] = 0;
181 181 (void) nvlist_add_string(newdimm, FM_FMRI_HC_REVISION, sbuf);
182 182 }
183 183 t = sizeof (nhm_dimm->label);
184 184 (void) strncpy(sbuf, nhm_dimm->label, t);
185 185 sbuf[t] = 0;
186 186 (void) nvlist_add_string(newdimm, FM_FAULT_FRU_LABEL, sbuf);
187 187 return (newdimm);
188 188 }
189 189
190 190 static void
191 191 inhm_dimmlist(uint32_t node, nvlist_t *nvl)
192 192 {
193 193 nvlist_t **dimmlist;
194 194 nvlist_t **newchannel;
195 195 int nchannels = CHANNELS_PER_MEMORY_CONTROLLER;
196 196 int nd;
197 197 uint8_t i, j;
198 198 nhm_dimm_t **dimmpp;
199 199 nhm_dimm_t *dimmp;
200 200
201 201 dimmlist = kmem_zalloc(sizeof (nvlist_t *) * MAX_DIMMS_PER_CHANNEL,
202 202 KM_SLEEP);
203 203 newchannel = kmem_zalloc(sizeof (nvlist_t *) * nchannels, KM_SLEEP);
204 204 dimmpp = &nhm_dimms[node * CHANNELS_PER_MEMORY_CONTROLLER *
205 205 MAX_DIMMS_PER_CHANNEL];
206 206 (void) nvlist_add_string(nvl, "memory-policy",
207 207 closed_page ? "closed-page" : "open-page");
208 208 (void) nvlist_add_string(nvl, "memory-ecc",
209 209 ecc_enabled ? lockstep[node] ? "x8" : "x4" : "no");
210 210 for (i = 0; i < nchannels; i++) {
211 211 (void) nvlist_alloc(&newchannel[i], NV_UNIQUE_NAME, KM_SLEEP);
212 212 (void) nvlist_add_string(newchannel[i], "channel-mode",
213 213 CHANNEL_DISABLED(MC_STATUS_RD(node), i) ? "disabled" :
214 214 i != 2 && lockstep[node] ? "lockstep" :
215 215 i != 2 && mirror_mode[node] ?
216 216 REDUNDANCY_LOSS(MC_RAS_STATUS_RD(node)) ?
217 217 "redundancy-loss" : "mirror" :
218 218 i == 2 && spare_channel[node] &&
219 219 !REDUNDANCY_LOSS(MC_RAS_STATUS_RD(node)) ? "spare" :
220 220 "independent");
221 221 nd = 0;
222 222 for (j = 0; j < MAX_DIMMS_PER_CHANNEL; j++) {
223 223 dimmp = *dimmpp;
224 224 if (dimmp != NULL) {
225 225 dimmlist[nd] = inhm_dimm(dimmp, node, i,
226 226 (uint32_t)j);
227 227 nd++;
228 228 }
229 229 dimmpp++;
230 230 }
231 231 if (nd) {
232 232 (void) nvlist_add_nvlist_array(newchannel[i],
233 233 "memory-dimms", dimmlist, nd);
234 234 for (j = 0; j < nd; j++)
235 235 nvlist_free(dimmlist[j]);
236 236 }
237 237 }
238 238 (void) nvlist_add_nvlist_array(nvl, MCINTEL_NVLIST_MC, newchannel,
239 239 nchannels);
240 240 for (i = 0; i < nchannels; i++)
241 241 nvlist_free(newchannel[i]);
242 242 kmem_free(dimmlist, sizeof (nvlist_t *) * MAX_DIMMS_PER_CHANNEL);
243 243 kmem_free(newchannel, sizeof (nvlist_t *) * nchannels);
244 244 }
245 245
246 246 char *
247 247 inhm_mc_name()
248 248 {
249 249 return (NHM_INTERCONNECT);
250 250 }
251 251
252 252 void
253 253 inhm_create_nvl(int chip)
254 254 {
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255 255 nvlist_t *nvl;
256 256
257 257 (void) nvlist_alloc(&nvl, NV_UNIQUE_NAME, KM_SLEEP);
258 258 (void) nvlist_add_uint8(nvl, MCINTEL_NVLIST_VERSTR,
259 259 MCINTEL_NVLIST_VERS);
260 260 (void) nvlist_add_string(nvl, MCINTEL_NVLIST_MEM, inhm_mc_name());
261 261 (void) nvlist_add_uint8(nvl, MCINTEL_NVLIST_NMEM, 1);
262 262 (void) nvlist_add_uint8(nvl, MCINTEL_NVLIST_NRANKS, 4);
263 263 inhm_dimmlist(chip, nvl);
264 264
265 - if (inhm_mc_nvl[chip])
266 - nvlist_free(inhm_mc_nvl[chip]);
265 + nvlist_free(inhm_mc_nvl[chip]);
267 266 inhm_mc_nvl[chip] = nvl;
268 267 }
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