Print this page
XXXX introduce drv_sectohz

*** 440,450 **** pps_fan_timeout_hz = drv_usectohz(PPS_FAN_TIMEOUT_USEC); bd_insert_delay_hz = drv_usectohz(BRD_INSERT_DELAY_USEC); bd_insert_retry_hz = drv_usectohz(BRD_INSERT_RETRY_USEC); bd_remove_timeout_hz = drv_usectohz(BRD_REMOVE_TIMEOUT_USEC); blink_led_timeout_hz = drv_usectohz(BLINK_LED_TIMEOUT_USEC); ! overtemp_timeout_hz = drv_usectohz(OVERTEMP_TIMEOUT_SEC * MICROSEC); keyswitch_timeout_hz = drv_usectohz(KEYSWITCH_TIMEOUT_USEC); /* * Map in the registers sets that OBP hands us. According * to the sun4u device tree spec., the register sets are as --- 440,450 ---- pps_fan_timeout_hz = drv_usectohz(PPS_FAN_TIMEOUT_USEC); bd_insert_delay_hz = drv_usectohz(BRD_INSERT_DELAY_USEC); bd_insert_retry_hz = drv_usectohz(BRD_INSERT_RETRY_USEC); bd_remove_timeout_hz = drv_usectohz(BRD_REMOVE_TIMEOUT_USEC); blink_led_timeout_hz = drv_usectohz(BLINK_LED_TIMEOUT_USEC); ! overtemp_timeout_hz = drv_sectohz(OVERTEMP_TIMEOUT_SEC); keyswitch_timeout_hz = drv_usectohz(KEYSWITCH_TIMEOUT_USEC); /* * Map in the registers sets that OBP hands us. According * to the sun4u device tree spec., the register sets are as