Print this page
XXXX define x2apic feature flag


   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
  23  * Copyright (c) 2011 by Delphix. All rights reserved.
  24  * Copyright 2013 Nexenta Systems, Inc. All rights reserved.

  25  */
  26 /*
  27  * Copyright (c) 2010, Intel Corporation.
  28  * All rights reserved.
  29  */
  30 /*
  31  * Portions Copyright 2009 Advanced Micro Devices, Inc.
  32  */
  33 /*
  34  * Copyright (c) 2012, Joyent, Inc. All rights reserved.
  35  */
  36 /*
  37  * Various routines to handle identification
  38  * and classification of x86 processors.
  39  */
  40 
  41 #include <sys/types.h>
  42 #include <sys/archsystm.h>
  43 #include <sys/x86_archext.h>
  44 #include <sys/kmem.h>


 146         "cx16",
 147         "cmp",
 148         "tscp",
 149         "mwait",
 150         "sse4a",
 151         "cpuid",
 152         "ssse3",
 153         "sse4_1",
 154         "sse4_2",
 155         "1gpg",
 156         "clfsh",
 157         "64",
 158         "aes",
 159         "pclmulqdq",
 160         "xsave",
 161         "avx",
 162         "vmx",
 163         "svm",
 164         "topoext",
 165         "f16c",
 166         "rdrand"

 167 };
 168 
 169 boolean_t
 170 is_x86_feature(void *featureset, uint_t feature)
 171 {
 172         ASSERT(feature < NUM_X86_FEATURES);
 173         return (BT_TEST((ulong_t *)featureset, feature));
 174 }
 175 
 176 void
 177 add_x86_feature(void *featureset, uint_t feature)
 178 {
 179         ASSERT(feature < NUM_X86_FEATURES);
 180         BT_SET((ulong_t *)featureset, feature);
 181 }
 182 
 183 void
 184 remove_x86_feature(void *featureset, uint_t feature)
 185 {
 186         ASSERT(feature < NUM_X86_FEATURES);


1294                         add_x86_feature(featureset, X86FSET_AES);
1295                 }
1296                 if (cp->cp_ecx & CPUID_INTC_ECX_PCLMULQDQ) {
1297                         add_x86_feature(featureset, X86FSET_PCLMULQDQ);
1298                 }
1299 
1300                 if (cp->cp_ecx & CPUID_INTC_ECX_XSAVE) {
1301                         add_x86_feature(featureset, X86FSET_XSAVE);
1302 
1303                         /* We only test AVX when there is XSAVE */
1304                         if (cp->cp_ecx & CPUID_INTC_ECX_AVX) {
1305                                 add_x86_feature(featureset,
1306                                     X86FSET_AVX);
1307 
1308                                 if (cp->cp_ecx & CPUID_INTC_ECX_F16C)
1309                                         add_x86_feature(featureset,
1310                                             X86FSET_F16C);
1311                         }
1312                 }
1313         }



1314         if (cp->cp_edx & CPUID_INTC_EDX_DE) {
1315                 add_x86_feature(featureset, X86FSET_DE);
1316         }
1317 #if !defined(__xpv)
1318         if (cp->cp_ecx & CPUID_INTC_ECX_MON) {
1319 
1320                 /*
1321                  * We require the CLFLUSH instruction for erratum workaround
1322                  * to use MONITOR/MWAIT.
1323                  */
1324                 if (cp->cp_edx & CPUID_INTC_EDX_CLFSH) {
1325                         cpi->cpi_mwait.support |= MWAIT_SUPPORT;
1326                         add_x86_feature(featureset, X86FSET_MWAIT);
1327                 } else {
1328                         extern int idle_cpu_assert_cflush_monitor;
1329 
1330                         /*
1331                          * All processors we are aware of which have
1332                          * MONITOR/MWAIT also have CLFLUSH.
1333                          */




   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
  23  * Copyright (c) 2011 by Delphix. All rights reserved.
  24  * Copyright 2013 Nexenta Systems, Inc. All rights reserved.
  25  * Copyright 2014 Josef "Jeff" Sipek <jeffpc@josefsipek.net>
  26  */
  27 /*
  28  * Copyright (c) 2010, Intel Corporation.
  29  * All rights reserved.
  30  */
  31 /*
  32  * Portions Copyright 2009 Advanced Micro Devices, Inc.
  33  */
  34 /*
  35  * Copyright (c) 2012, Joyent, Inc. All rights reserved.
  36  */
  37 /*
  38  * Various routines to handle identification
  39  * and classification of x86 processors.
  40  */
  41 
  42 #include <sys/types.h>
  43 #include <sys/archsystm.h>
  44 #include <sys/x86_archext.h>
  45 #include <sys/kmem.h>


 147         "cx16",
 148         "cmp",
 149         "tscp",
 150         "mwait",
 151         "sse4a",
 152         "cpuid",
 153         "ssse3",
 154         "sse4_1",
 155         "sse4_2",
 156         "1gpg",
 157         "clfsh",
 158         "64",
 159         "aes",
 160         "pclmulqdq",
 161         "xsave",
 162         "avx",
 163         "vmx",
 164         "svm",
 165         "topoext",
 166         "f16c",
 167         "rdrand",
 168         "x2apic",
 169 };
 170 
 171 boolean_t
 172 is_x86_feature(void *featureset, uint_t feature)
 173 {
 174         ASSERT(feature < NUM_X86_FEATURES);
 175         return (BT_TEST((ulong_t *)featureset, feature));
 176 }
 177 
 178 void
 179 add_x86_feature(void *featureset, uint_t feature)
 180 {
 181         ASSERT(feature < NUM_X86_FEATURES);
 182         BT_SET((ulong_t *)featureset, feature);
 183 }
 184 
 185 void
 186 remove_x86_feature(void *featureset, uint_t feature)
 187 {
 188         ASSERT(feature < NUM_X86_FEATURES);


1296                         add_x86_feature(featureset, X86FSET_AES);
1297                 }
1298                 if (cp->cp_ecx & CPUID_INTC_ECX_PCLMULQDQ) {
1299                         add_x86_feature(featureset, X86FSET_PCLMULQDQ);
1300                 }
1301 
1302                 if (cp->cp_ecx & CPUID_INTC_ECX_XSAVE) {
1303                         add_x86_feature(featureset, X86FSET_XSAVE);
1304 
1305                         /* We only test AVX when there is XSAVE */
1306                         if (cp->cp_ecx & CPUID_INTC_ECX_AVX) {
1307                                 add_x86_feature(featureset,
1308                                     X86FSET_AVX);
1309 
1310                                 if (cp->cp_ecx & CPUID_INTC_ECX_F16C)
1311                                         add_x86_feature(featureset,
1312                                             X86FSET_F16C);
1313                         }
1314                 }
1315         }
1316         if (cp->cp_ecx & CPUID_INTC_ECX_X2APIC) {
1317                 add_x86_feature(featureset, X86FSET_X2APIC);
1318         }
1319         if (cp->cp_edx & CPUID_INTC_EDX_DE) {
1320                 add_x86_feature(featureset, X86FSET_DE);
1321         }
1322 #if !defined(__xpv)
1323         if (cp->cp_ecx & CPUID_INTC_ECX_MON) {
1324 
1325                 /*
1326                  * We require the CLFLUSH instruction for erratum workaround
1327                  * to use MONITOR/MWAIT.
1328                  */
1329                 if (cp->cp_edx & CPUID_INTC_EDX_CLFSH) {
1330                         cpi->cpi_mwait.support |= MWAIT_SUPPORT;
1331                         add_x86_feature(featureset, X86FSET_MWAIT);
1332                 } else {
1333                         extern int idle_cpu_assert_cflush_monitor;
1334 
1335                         /*
1336                          * All processors we are aware of which have
1337                          * MONITOR/MWAIT also have CLFLUSH.
1338                          */