1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
23 /* All Rights Reserved */
24
25 /*
26 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
27 * Use is subject to license terms.
28 */
29
30 #include <sys/param.h>
31 #include <sys/types.h>
32 #include <sys/vmparam.h>
33 #include <sys/systm.h>
34 #include <sys/stack.h>
35 #include <sys/frame.h>
36 #include <sys/proc.h>
37 #include <sys/ucontext.h>
38 #include <sys/cpuvar.h>
39 #include <sys/asm_linkage.h>
40 #include <sys/kmem.h>
41 #include <sys/errno.h>
42 #include <sys/bootconf.h>
43 #include <sys/archsystm.h>
44 #include <sys/fpu/fpusystm.h>
45 #include <sys/debug.h>
46 #include <sys/privregs.h>
47 #include <sys/machpcb.h>
48 #include <sys/psr_compat.h>
49 #include <sys/cmn_err.h>
50 #include <sys/asi.h>
51 #include <sys/copyops.h>
52 #include <sys/model.h>
53 #include <sys/panic.h>
54 #include <sys/exec.h>
55
56 /*
57 * By default, set the weakest model to TSO (Total Store Order)
58 * which is the default memory model on SPARC.
59 * If a platform does support a weaker model than TSO, this will be
60 * updated at runtime to reflect that.
61 */
62 uint_t weakest_mem_model = TSTATE_MM_TSO;
63
64 /*
65 * modify the lower 32bits of a uint64_t
66 */
67 #define SET_LOWER_32(all, lower) \
68 (((uint64_t)(all) & 0xffffffff00000000) | (uint32_t)(lower))
69
70 #define MEMCPY_FPU_EN 2 /* fprs on and fpu_en == 0 */
71
72 static uint_t mkpsr(uint64_t tstate, uint32_t fprs);
73
74 #ifdef _SYSCALL32_IMPL
75 static void fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
76 const struct fq32 *sfq, struct _fq *dfq);
77 #endif /* _SYSCALL32_IMPL */
78
79 /*
80 * Set floating-point registers.
81 * NOTE: 'lwp' might not correspond to 'curthread' since this is
82 * called from code in /proc to set the registers of another lwp.
83 */
84 void
85 setfpregs(klwp_t *lwp, fpregset_t *fp)
86 {
87 struct machpcb *mpcb;
88 kfpu_t *pfp;
89 uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL);
90 model_t model = lwp_getdatamodel(lwp);
91
92 mpcb = lwptompcb(lwp);
93 pfp = lwptofpu(lwp);
94
95 /*
96 * This is always true for both "real" fp programs and memcpy fp
97 * programs, because we force fpu_en to MEMCPY_FPU_EN in getfpregs,
98 * for the memcpy and threads cases where (fpu_en == 0) &&
99 * (fpu_fprs & FPRS_FEF), if setfpregs is called after getfpregs.
100 */
101 if (fp->fpu_en) {
102 kpreempt_disable();
103
104 if (!(pfp->fpu_en) && (!(pfp->fpu_fprs & FPRS_FEF)) &&
105 fpu_exists) {
106 /*
107 * He's not currently using the FPU but wants to in his
108 * new context - arrange for this on return to userland.
109 */
110 pfp->fpu_fprs = (uint32_t)fprs;
111 }
112 /*
113 * Get setfpregs to restore fpu_en to zero
114 * for the memcpy/threads case (where pfp->fpu_en == 0 &&
115 * (pfp->fp_fprs & FPRS_FEF) == FPRS_FEF).
116 */
117 if (fp->fpu_en == MEMCPY_FPU_EN)
118 fp->fpu_en = 0;
119
120 /*
121 * Load up a user's floating point context.
122 */
123 if (fp->fpu_qcnt > MAXFPQ) /* plug security holes */
124 fp->fpu_qcnt = MAXFPQ;
125 fp->fpu_q_entrysize = sizeof (struct _fq);
126
127 /*
128 * For v9 kernel, copy all of the fp regs.
129 * For v8 kernel, copy v8 fp regs (lower half of v9 fp regs).
130 * Restore entire fsr for v9, only lower half for v8.
131 */
132 (void) kcopy(fp, pfp, sizeof (fp->fpu_fr));
133 if (model == DATAMODEL_LP64)
134 pfp->fpu_fsr = fp->fpu_fsr;
135 else
136 pfp->fpu_fsr = SET_LOWER_32(pfp->fpu_fsr, fp->fpu_fsr);
137 pfp->fpu_qcnt = fp->fpu_qcnt;
138 pfp->fpu_q_entrysize = fp->fpu_q_entrysize;
139 pfp->fpu_en = fp->fpu_en;
140 pfp->fpu_q = mpcb->mpcb_fpu_q;
141 if (fp->fpu_qcnt)
142 (void) kcopy(fp->fpu_q, pfp->fpu_q,
143 fp->fpu_qcnt * fp->fpu_q_entrysize);
144 /* FSR ignores these bits on load, so they can not be set */
145 pfp->fpu_fsr &= ~(FSR_QNE|FSR_FTT);
146
147 /*
148 * If not the current process then resume() will handle it.
149 */
150 if (lwp != ttolwp(curthread)) {
151 /* force resume to reload fp regs */
152 pfp->fpu_fprs |= FPRS_FEF;
153 kpreempt_enable();
154 return;
155 }
156
157 /*
158 * Load up FPU with new floating point context.
159 */
160 if (fpu_exists) {
161 pfp->fpu_fprs = _fp_read_fprs();
162 if ((pfp->fpu_fprs & FPRS_FEF) != FPRS_FEF) {
163 _fp_write_fprs(fprs);
164 pfp->fpu_fprs = (uint32_t)fprs;
165 #ifdef DEBUG
166 if (fpdispr)
167 cmn_err(CE_NOTE,
168 "setfpregs with fp disabled!\n");
169 #endif
170 }
171 /*
172 * Load all fp regs for v9 user programs, but only
173 * load the lower half for v8[plus] programs.
174 */
175 if (model == DATAMODEL_LP64)
176 fp_restore(pfp);
177 else
178 fp_v8_load(pfp);
179 }
180
181 kpreempt_enable();
182 } else {
183 if ((pfp->fpu_en) || /* normal fp case */
184 (pfp->fpu_fprs & FPRS_FEF)) { /* memcpy/threads case */
185 /*
186 * Currently the lwp has floating point enabled.
187 * Turn off FPRS_FEF in user's fprs, saved and
188 * real copies thereof.
189 */
190 pfp->fpu_en = 0;
191 if (fpu_exists) {
192 fprs = 0;
193 if (lwp == ttolwp(curthread))
194 _fp_write_fprs(fprs);
195 pfp->fpu_fprs = (uint32_t)fprs;
196 }
197 }
198 }
199 }
200
201 #ifdef _SYSCALL32_IMPL
202 void
203 setfpregs32(klwp_t *lwp, fpregset32_t *fp)
204 {
205 fpregset_t fpregs;
206
207 fpuregset_32ton(fp, &fpregs, NULL, NULL);
208 setfpregs(lwp, &fpregs);
209 }
210 #endif /* _SYSCALL32_IMPL */
211
212 /*
213 * NOTE: 'lwp' might not correspond to 'curthread' since this is
214 * called from code in /proc to set the registers of another lwp.
215 */
216 void
217 run_fpq(klwp_t *lwp, fpregset_t *fp)
218 {
219 /*
220 * If the context being loaded up includes a floating queue,
221 * we need to simulate those instructions (since we can't reload
222 * the fpu) and pass the process any appropriate signals
223 */
224
225 if (lwp == ttolwp(curthread)) {
226 if (fpu_exists) {
227 if (fp->fpu_qcnt)
228 fp_runq(lwp->lwp_regs);
229 }
230 }
231 }
232
233 /*
234 * Get floating-point registers.
235 * NOTE: 'lwp' might not correspond to 'curthread' since this is
236 * called from code in /proc to set the registers of another lwp.
237 */
238 void
239 getfpregs(klwp_t *lwp, fpregset_t *fp)
240 {
241 kfpu_t *pfp;
242 model_t model = lwp_getdatamodel(lwp);
243
244 pfp = lwptofpu(lwp);
245 kpreempt_disable();
246 if (fpu_exists && ttolwp(curthread) == lwp)
247 pfp->fpu_fprs = _fp_read_fprs();
248
249 /*
250 * First check the fpu_en case, for normal fp programs.
251 * Next check the fprs case, for fp use by memcpy/threads.
252 */
253 if (((fp->fpu_en = pfp->fpu_en) != 0) ||
254 (pfp->fpu_fprs & FPRS_FEF)) {
255 /*
256 * Force setfpregs to restore the fp context in
257 * setfpregs for the memcpy and threads cases (where
258 * pfp->fpu_en == 0 && (pfp->fp_fprs & FPRS_FEF) == FPRS_FEF).
259 */
260 if (pfp->fpu_en == 0)
261 fp->fpu_en = MEMCPY_FPU_EN;
262 /*
263 * If we have an fpu and the current thread owns the fp
264 * context, flush fp * registers into the pcb. Save all
265 * the fp regs for v9, xregs_getfpregs saves the upper half
266 * for v8plus. Save entire fsr for v9, only lower half for v8.
267 */
268 if (fpu_exists && ttolwp(curthread) == lwp) {
269 if ((pfp->fpu_fprs & FPRS_FEF) != FPRS_FEF) {
270 uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL);
271
272 _fp_write_fprs(fprs);
273 pfp->fpu_fprs = fprs;
274 #ifdef DEBUG
275 if (fpdispr)
276 cmn_err(CE_NOTE,
277 "getfpregs with fp disabled!\n");
278 #endif
279 }
280 if (model == DATAMODEL_LP64)
281 fp_fksave(pfp);
282 else
283 fp_v8_fksave(pfp);
284 }
285 (void) kcopy(pfp, fp, sizeof (fp->fpu_fr));
286 fp->fpu_q = pfp->fpu_q;
287 if (model == DATAMODEL_LP64)
288 fp->fpu_fsr = pfp->fpu_fsr;
289 else
290 fp->fpu_fsr = (uint32_t)pfp->fpu_fsr;
291 fp->fpu_qcnt = pfp->fpu_qcnt;
292 fp->fpu_q_entrysize = pfp->fpu_q_entrysize;
293 } else {
294 int i;
295 for (i = 0; i < 32; i++) /* NaN */
296 ((uint32_t *)fp->fpu_fr.fpu_regs)[i] = (uint32_t)-1;
297 if (model == DATAMODEL_LP64) {
298 for (i = 16; i < 32; i++) /* NaN */
299 ((uint64_t *)fp->fpu_fr.fpu_dregs)[i] =
300 (uint64_t)-1;
301 }
302 fp->fpu_fsr = 0;
303 fp->fpu_qcnt = 0;
304 }
305 kpreempt_enable();
306 }
307
308 #ifdef _SYSCALL32_IMPL
309 void
310 getfpregs32(klwp_t *lwp, fpregset32_t *fp)
311 {
312 fpregset_t fpregs;
313
314 getfpregs(lwp, &fpregs);
315 fpuregset_nto32(&fpregs, fp, NULL);
316 }
317 #endif /* _SYSCALL32_IMPL */
318
319 /*
320 * Set general registers.
321 * NOTE: 'lwp' might not correspond to 'curthread' since this is
322 * called from code in /proc to set the registers of another lwp.
323 */
324
325 /* 64-bit gregset_t */
326 void
327 setgregs(klwp_t *lwp, gregset_t grp)
328 {
329 struct regs *rp = lwptoregs(lwp);
330 kfpu_t *fp = lwptofpu(lwp);
331 uint64_t tbits;
332
333 int current = (lwp == curthread->t_lwp);
334
335 if (current)
336 (void) save_syscall_args(); /* copy the args first */
337
338 tbits = (((grp[REG_CCR] & TSTATE_CCR_MASK) << TSTATE_CCR_SHIFT) |
339 ((grp[REG_ASI] & TSTATE_ASI_MASK) << TSTATE_ASI_SHIFT));
340 rp->r_tstate &= ~(((uint64_t)TSTATE_CCR_MASK << TSTATE_CCR_SHIFT) |
341 ((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT));
342 rp->r_tstate |= tbits;
343 kpreempt_disable();
344 fp->fpu_fprs = (uint32_t)grp[REG_FPRS];
345 if (fpu_exists && (current) && (fp->fpu_fprs & FPRS_FEF))
346 _fp_write_fprs(fp->fpu_fprs);
347 kpreempt_enable();
348
349 /*
350 * pc and npc must be 4-byte aligned on sparc.
351 * We silently make it so to avoid a watchdog reset.
352 */
353 rp->r_pc = grp[REG_PC] & ~03L;
354 rp->r_npc = grp[REG_nPC] & ~03L;
355 rp->r_y = grp[REG_Y];
356
357 rp->r_g1 = grp[REG_G1];
358 rp->r_g2 = grp[REG_G2];
359 rp->r_g3 = grp[REG_G3];
360 rp->r_g4 = grp[REG_G4];
361 rp->r_g5 = grp[REG_G5];
362 rp->r_g6 = grp[REG_G6];
363 rp->r_g7 = grp[REG_G7];
364
365 rp->r_o0 = grp[REG_O0];
366 rp->r_o1 = grp[REG_O1];
367 rp->r_o2 = grp[REG_O2];
368 rp->r_o3 = grp[REG_O3];
369 rp->r_o4 = grp[REG_O4];
370 rp->r_o5 = grp[REG_O5];
371 rp->r_o6 = grp[REG_O6];
372 rp->r_o7 = grp[REG_O7];
373
374 if (current) {
375 /*
376 * This was called from a system call, but we
377 * do not want to return via the shared window;
378 * restoring the CPU context changes everything.
379 */
380 lwp->lwp_eosys = JUSTRETURN;
381 curthread->t_post_sys = 1;
382 }
383 }
384
385 /*
386 * Return the general registers.
387 * NOTE: 'lwp' might not correspond to 'curthread' since this is
388 * called from code in /proc to get the registers of another lwp.
389 */
390 void
391 getgregs(klwp_t *lwp, gregset_t grp)
392 {
393 struct regs *rp = lwptoregs(lwp);
394 uint32_t fprs;
395
396 kpreempt_disable();
397 if (fpu_exists && ttolwp(curthread) == lwp) {
398 fprs = _fp_read_fprs();
399 } else {
400 kfpu_t *fp = lwptofpu(lwp);
401 fprs = fp->fpu_fprs;
402 }
403 kpreempt_enable();
404 grp[REG_CCR] = (rp->r_tstate >> TSTATE_CCR_SHIFT) & TSTATE_CCR_MASK;
405 grp[REG_PC] = rp->r_pc;
406 grp[REG_nPC] = rp->r_npc;
407 grp[REG_Y] = (uint32_t)rp->r_y;
408 grp[REG_G1] = rp->r_g1;
409 grp[REG_G2] = rp->r_g2;
410 grp[REG_G3] = rp->r_g3;
411 grp[REG_G4] = rp->r_g4;
412 grp[REG_G5] = rp->r_g5;
413 grp[REG_G6] = rp->r_g6;
414 grp[REG_G7] = rp->r_g7;
415 grp[REG_O0] = rp->r_o0;
416 grp[REG_O1] = rp->r_o1;
417 grp[REG_O2] = rp->r_o2;
418 grp[REG_O3] = rp->r_o3;
419 grp[REG_O4] = rp->r_o4;
420 grp[REG_O5] = rp->r_o5;
421 grp[REG_O6] = rp->r_o6;
422 grp[REG_O7] = rp->r_o7;
423 grp[REG_ASI] = (rp->r_tstate >> TSTATE_ASI_SHIFT) & TSTATE_ASI_MASK;
424 grp[REG_FPRS] = fprs;
425 }
426
427 void
428 getgregs32(klwp_t *lwp, gregset32_t grp)
429 {
430 struct regs *rp = lwptoregs(lwp);
431 uint32_t fprs;
432
433 kpreempt_disable();
434 if (fpu_exists && ttolwp(curthread) == lwp) {
435 fprs = _fp_read_fprs();
436 } else {
437 kfpu_t *fp = lwptofpu(lwp);
438 fprs = fp->fpu_fprs;
439 }
440 kpreempt_enable();
441 grp[REG_PSR] = mkpsr(rp->r_tstate, fprs);
442 grp[REG_PC] = rp->r_pc;
443 grp[REG_nPC] = rp->r_npc;
444 grp[REG_Y] = rp->r_y;
445 grp[REG_G1] = rp->r_g1;
446 grp[REG_G2] = rp->r_g2;
447 grp[REG_G3] = rp->r_g3;
448 grp[REG_G4] = rp->r_g4;
449 grp[REG_G5] = rp->r_g5;
450 grp[REG_G6] = rp->r_g6;
451 grp[REG_G7] = rp->r_g7;
452 grp[REG_O0] = rp->r_o0;
453 grp[REG_O1] = rp->r_o1;
454 grp[REG_O2] = rp->r_o2;
455 grp[REG_O3] = rp->r_o3;
456 grp[REG_O4] = rp->r_o4;
457 grp[REG_O5] = rp->r_o5;
458 grp[REG_O6] = rp->r_o6;
459 grp[REG_O7] = rp->r_o7;
460 }
461
462 /*
463 * Return the user-level PC.
464 * If in a system call, return the address of the syscall trap.
465 */
466 greg_t
467 getuserpc()
468 {
469 return (lwptoregs(ttolwp(curthread))->r_pc);
470 }
471
472 /*
473 * Set register windows.
474 */
475 void
476 setgwins(klwp_t *lwp, gwindows_t *gwins)
477 {
478 struct machpcb *mpcb = lwptompcb(lwp);
479 int wbcnt = gwins->wbcnt;
480 caddr_t sp;
481 int i;
482 struct rwindow32 *rwp;
483 int wbuf_rwindow_size;
484 int is64;
485
486 if (mpcb->mpcb_wstate == WSTATE_USER32) {
487 wbuf_rwindow_size = WINDOWSIZE32;
488 is64 = 0;
489 } else {
490 wbuf_rwindow_size = WINDOWSIZE64;
491 is64 = 1;
492 }
493 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW);
494 mpcb->mpcb_wbcnt = 0;
495 for (i = 0; i < wbcnt; i++) {
496 sp = (caddr_t)gwins->spbuf[i];
497 mpcb->mpcb_spbuf[i] = sp;
498 rwp = (struct rwindow32 *)
499 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size));
500 if (is64 && IS_V9STACK(sp))
501 bcopy(&gwins->wbuf[i], rwp, sizeof (struct rwindow));
502 else
503 rwindow_nto32(&gwins->wbuf[i], rwp);
504 mpcb->mpcb_wbcnt++;
505 }
506 }
507
508 void
509 setgwins32(klwp_t *lwp, gwindows32_t *gwins)
510 {
511 struct machpcb *mpcb = lwptompcb(lwp);
512 int wbcnt = gwins->wbcnt;
513 caddr_t sp;
514 int i;
515
516 struct rwindow *rwp;
517 int wbuf_rwindow_size;
518 int is64;
519
520 if (mpcb->mpcb_wstate == WSTATE_USER32) {
521 wbuf_rwindow_size = WINDOWSIZE32;
522 is64 = 0;
523 } else {
524 wbuf_rwindow_size = WINDOWSIZE64;
525 is64 = 1;
526 }
527
528 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW);
529 mpcb->mpcb_wbcnt = 0;
530 for (i = 0; i < wbcnt; i++) {
531 sp = (caddr_t)(uintptr_t)gwins->spbuf[i];
532 mpcb->mpcb_spbuf[i] = sp;
533 rwp = (struct rwindow *)
534 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size));
535 if (is64 && IS_V9STACK(sp))
536 rwindow_32ton(&gwins->wbuf[i], rwp);
537 else
538 bcopy(&gwins->wbuf[i], rwp, sizeof (struct rwindow32));
539 mpcb->mpcb_wbcnt++;
540 }
541 }
542
543 /*
544 * Get register windows.
545 * NOTE: 'lwp' might not correspond to 'curthread' since this is
546 * called from code in /proc to set the registers of another lwp.
547 */
548 void
549 getgwins(klwp_t *lwp, gwindows_t *gwp)
550 {
551 struct machpcb *mpcb = lwptompcb(lwp);
552 int wbcnt = mpcb->mpcb_wbcnt;
553 caddr_t sp;
554 int i;
555 struct rwindow32 *rwp;
556 int wbuf_rwindow_size;
557 int is64;
558
559 if (mpcb->mpcb_wstate == WSTATE_USER32) {
560 wbuf_rwindow_size = WINDOWSIZE32;
561 is64 = 0;
562 } else {
563 wbuf_rwindow_size = WINDOWSIZE64;
564 is64 = 1;
565 }
566 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW);
567 gwp->wbcnt = wbcnt;
568 for (i = 0; i < wbcnt; i++) {
569 sp = mpcb->mpcb_spbuf[i];
570 gwp->spbuf[i] = (greg_t *)sp;
571 rwp = (struct rwindow32 *)
572 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size));
573 if (is64 && IS_V9STACK(sp))
574 bcopy(rwp, &gwp->wbuf[i], sizeof (struct rwindow));
575 else
576 rwindow_32ton(rwp, &gwp->wbuf[i]);
577 }
578 }
579
580 void
581 getgwins32(klwp_t *lwp, gwindows32_t *gwp)
582 {
583 struct machpcb *mpcb = lwptompcb(lwp);
584 int wbcnt = mpcb->mpcb_wbcnt;
585 int i;
586 struct rwindow *rwp;
587 int wbuf_rwindow_size;
588 caddr_t sp;
589 int is64;
590
591 if (mpcb->mpcb_wstate == WSTATE_USER32) {
592 wbuf_rwindow_size = WINDOWSIZE32;
593 is64 = 0;
594 } else {
595 wbuf_rwindow_size = WINDOWSIZE64;
596 is64 = 1;
597 }
598
599 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW);
600 gwp->wbcnt = wbcnt;
601 for (i = 0; i < wbcnt; i++) {
602 sp = mpcb->mpcb_spbuf[i];
603 rwp = (struct rwindow *)
604 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size));
605 gwp->spbuf[i] = (caddr32_t)(uintptr_t)sp;
606 if (is64 && IS_V9STACK(sp))
607 rwindow_nto32(rwp, &gwp->wbuf[i]);
608 else
609 bcopy(rwp, &gwp->wbuf[i], sizeof (struct rwindow32));
610 }
611 }
612
613 /*
614 * For things that depend on register state being on the stack,
615 * copy any register windows that get saved into the window buffer
616 * (in the pcb) onto the stack. This normally gets fixed up
617 * before returning to a user program. Callers of this routine
618 * require this to happen immediately because a later kernel
619 * operation depends on window state (like instruction simulation).
620 */
621 int
622 flush_user_windows_to_stack(caddr_t *psp)
623 {
624 int j, k;
625 caddr_t sp;
626 struct machpcb *mpcb = lwptompcb(ttolwp(curthread));
627 int err;
628 int error = 0;
629 int wbuf_rwindow_size;
630 int rwindow_size;
631 int stack_align;
632 int watched;
633
634 flush_user_windows();
635
636 if (mpcb->mpcb_wstate != WSTATE_USER32)
637 wbuf_rwindow_size = WINDOWSIZE64;
638 else
639 wbuf_rwindow_size = WINDOWSIZE32;
640
641 j = mpcb->mpcb_wbcnt;
642 while (j > 0) {
643 sp = mpcb->mpcb_spbuf[--j];
644
645 if ((mpcb->mpcb_wstate != WSTATE_USER32) &&
646 IS_V9STACK(sp)) {
647 sp += V9BIAS64;
648 stack_align = STACK_ALIGN64;
649 rwindow_size = WINDOWSIZE64;
650 } else {
651 /*
652 * Reduce sp to a 32 bit value. This was originally
653 * done by casting down to uint32_t and back up to
654 * caddr_t, but one compiler didn't like that, so the
655 * uintptr_t casts were added. The temporary 32 bit
656 * variable was introduced to avoid depending on all
657 * compilers to generate the desired assembly code for a
658 * quadruple cast in a single expression.
659 */
660 caddr32_t sp32 = (uint32_t)(uintptr_t)sp;
661 sp = (caddr_t)(uintptr_t)sp32;
662
663 stack_align = STACK_ALIGN32;
664 rwindow_size = WINDOWSIZE32;
665 }
666 if (((uintptr_t)sp & (stack_align - 1)) != 0)
667 continue;
668
669 watched = watch_disable_addr(sp, rwindow_size, S_WRITE);
670 err = xcopyout(mpcb->mpcb_wbuf +
671 (j * wbuf_rwindow_size), sp, rwindow_size);
672 if (err != 0) {
673 if (psp != NULL) {
674 /*
675 * Determine the offending address.
676 * It may not be the stack pointer itself.
677 */
678 uint_t *kaddr = (uint_t *)(mpcb->mpcb_wbuf +
679 (j * wbuf_rwindow_size));
680 uint_t *uaddr = (uint_t *)sp;
681
682 for (k = 0;
683 k < rwindow_size / sizeof (int);
684 k++, kaddr++, uaddr++) {
685 if (suword32(uaddr, *kaddr))
686 break;
687 }
688
689 /* can't happen? */
690 if (k == rwindow_size / sizeof (int))
691 uaddr = (uint_t *)sp;
692
693 *psp = (caddr_t)uaddr;
694 }
695 error = err;
696 } else {
697 /*
698 * stack was aligned and copyout succeeded;
699 * move other windows down.
700 */
701 mpcb->mpcb_wbcnt--;
702 for (k = j; k < mpcb->mpcb_wbcnt; k++) {
703 mpcb->mpcb_spbuf[k] = mpcb->mpcb_spbuf[k+1];
704 bcopy(
705 mpcb->mpcb_wbuf +
706 ((k+1) * wbuf_rwindow_size),
707 mpcb->mpcb_wbuf +
708 (k * wbuf_rwindow_size),
709 wbuf_rwindow_size);
710 }
711 }
712 if (watched)
713 watch_enable_addr(sp, rwindow_size, S_WRITE);
714 } /* while there are windows in the wbuf */
715 return (error);
716 }
717
718 static int
719 copy_return_window32(int dotwo)
720 {
721 klwp_t *lwp = ttolwp(curthread);
722 struct machpcb *mpcb = lwptompcb(lwp);
723 struct rwindow32 rwindow32;
724 caddr_t sp1;
725 caddr_t sp2;
726
727 (void) flush_user_windows_to_stack(NULL);
728 if (mpcb->mpcb_rsp[0] == NULL) {
729 /*
730 * Reduce r_sp to a 32 bit value before storing it in sp1. This
731 * was originally done by casting down to uint32_t and back up
732 * to caddr_t, but that generated complaints under one compiler.
733 * The uintptr_t cast was added to address that, and the
734 * temporary 32 bit variable was introduced to avoid depending
735 * on all compilers to generate the desired assembly code for a
736 * triple cast in a single expression.
737 */
738 caddr32_t sp1_32 = (uint32_t)lwptoregs(lwp)->r_sp;
739 sp1 = (caddr_t)(uintptr_t)sp1_32;
740
741 if ((copyin_nowatch(sp1, &rwindow32,
742 sizeof (struct rwindow32))) == 0)
743 mpcb->mpcb_rsp[0] = sp1;
744 rwindow_32ton(&rwindow32, &mpcb->mpcb_rwin[0]);
745 }
746 mpcb->mpcb_rsp[1] = NULL;
747 if (dotwo && mpcb->mpcb_rsp[0] != NULL &&
748 (sp2 = (caddr_t)mpcb->mpcb_rwin[0].rw_fp) != NULL) {
749 if ((copyin_nowatch(sp2, &rwindow32,
750 sizeof (struct rwindow32)) == 0))
751 mpcb->mpcb_rsp[1] = sp2;
752 rwindow_32ton(&rwindow32, &mpcb->mpcb_rwin[1]);
753 }
754 return (mpcb->mpcb_rsp[0] != NULL);
755 }
756
757 int
758 copy_return_window(int dotwo)
759 {
760 proc_t *p = ttoproc(curthread);
761 klwp_t *lwp;
762 struct machpcb *mpcb;
763 caddr_t sp1;
764 caddr_t sp2;
765
766 if (p->p_model == DATAMODEL_ILP32)
767 return (copy_return_window32(dotwo));
768
769 lwp = ttolwp(curthread);
770 mpcb = lwptompcb(lwp);
771 (void) flush_user_windows_to_stack(NULL);
772 if (mpcb->mpcb_rsp[0] == NULL) {
773 sp1 = (caddr_t)lwptoregs(lwp)->r_sp + STACK_BIAS;
774 if ((copyin_nowatch(sp1, &mpcb->mpcb_rwin[0],
775 sizeof (struct rwindow)) == 0))
776 mpcb->mpcb_rsp[0] = sp1 - STACK_BIAS;
777 }
778 mpcb->mpcb_rsp[1] = NULL;
779 if (dotwo && mpcb->mpcb_rsp[0] != NULL &&
780 (sp2 = (caddr_t)mpcb->mpcb_rwin[0].rw_fp) != NULL) {
781 sp2 += STACK_BIAS;
782 if ((copyin_nowatch(sp2, &mpcb->mpcb_rwin[1],
783 sizeof (struct rwindow)) == 0))
784 mpcb->mpcb_rsp[1] = sp2 - STACK_BIAS;
785 }
786 return (mpcb->mpcb_rsp[0] != NULL);
787 }
788
789 /*
790 * Clear registers on exec(2).
791 */
792 void
793 setregs(uarg_t *args)
794 {
795 struct regs *rp;
796 klwp_t *lwp = ttolwp(curthread);
797 kfpu_t *fpp = lwptofpu(lwp);
798 struct machpcb *mpcb = lwptompcb(lwp);
799 proc_t *p = ttoproc(curthread);
800
801 /*
802 * Initialize user registers.
803 */
804 (void) save_syscall_args(); /* copy args from registers first */
805 rp = lwptoregs(lwp);
806 rp->r_g1 = rp->r_g2 = rp->r_g3 = rp->r_g4 = rp->r_g5 =
807 rp->r_g6 = rp->r_o0 = rp->r_o1 = rp->r_o2 =
808 rp->r_o3 = rp->r_o4 = rp->r_o5 = rp->r_o7 = 0;
809 if (p->p_model == DATAMODEL_ILP32)
810 rp->r_tstate = TSTATE_USER32 | weakest_mem_model;
811 else
812 rp->r_tstate = TSTATE_USER64 | weakest_mem_model;
813 if (!fpu_exists)
814 rp->r_tstate &= ~TSTATE_PEF;
815 rp->r_g7 = args->thrptr;
816 rp->r_pc = args->entry;
817 rp->r_npc = args->entry + 4;
818 rp->r_y = 0;
819 curthread->t_post_sys = 1;
820 lwp->lwp_eosys = JUSTRETURN;
821 lwp->lwp_pcb.pcb_trap0addr = NULL; /* no trap 0 handler */
822 /*
823 * Clear the fixalignment flag
824 */
825 p->p_fixalignment = 0;
826
827 /*
828 * Throw out old user windows, init window buf.
829 */
830 trash_user_windows();
831
832 if (p->p_model == DATAMODEL_LP64 &&
833 mpcb->mpcb_wstate != WSTATE_USER64) {
834 ASSERT(mpcb->mpcb_wbcnt == 0);
835 kmem_cache_free(wbuf32_cache, mpcb->mpcb_wbuf);
836 mpcb->mpcb_wbuf = kmem_cache_alloc(wbuf64_cache, KM_SLEEP);
837 ASSERT(((uintptr_t)mpcb->mpcb_wbuf & 7) == 0);
838 mpcb->mpcb_wstate = WSTATE_USER64;
839 } else if (p->p_model == DATAMODEL_ILP32 &&
840 mpcb->mpcb_wstate != WSTATE_USER32) {
841 ASSERT(mpcb->mpcb_wbcnt == 0);
842 kmem_cache_free(wbuf64_cache, mpcb->mpcb_wbuf);
843 mpcb->mpcb_wbuf = kmem_cache_alloc(wbuf32_cache, KM_SLEEP);
844 mpcb->mpcb_wstate = WSTATE_USER32;
845 }
846 mpcb->mpcb_pa = va_to_pa(mpcb);
847 mpcb->mpcb_wbuf_pa = va_to_pa(mpcb->mpcb_wbuf);
848
849 /*
850 * Here we initialize minimal fpu state.
851 * The rest is done at the first floating
852 * point instruction that a process executes
853 * or by the lib_psr memcpy routines.
854 */
855 if (fpu_exists) {
856 extern void _fp_write_fprs(unsigned);
857 _fp_write_fprs(0);
858 }
859 fpp->fpu_en = 0;
860 fpp->fpu_fprs = 0;
861 }
862
863 /*
864 * Construct the execution environment for the user's signal
865 * handler and arrange for control to be given to it on return
866 * to userland. The library code now calls setcontext() to
867 * clean up after the signal handler, so sigret() is no longer
868 * needed.
869 */
870 int
871 sendsig(int sig, k_siginfo_t *sip, void (*hdlr)())
872 {
873 /*
874 * 'volatile' is needed to ensure that values are
875 * correct on the error return from on_fault().
876 */
877 volatile int minstacksz; /* min stack required to catch signal */
878 int newstack = 0; /* if true, switching to altstack */
879 label_t ljb;
880 caddr_t sp;
881 struct regs *volatile rp;
882 klwp_t *lwp = ttolwp(curthread);
883 proc_t *volatile p = ttoproc(curthread);
884 int fpq_size = 0;
885 struct sigframe {
886 struct frame frwin;
887 ucontext_t uc;
888 };
889 siginfo_t *sip_addr;
890 struct sigframe *volatile fp;
891 ucontext_t *volatile tuc = NULL;
892 char *volatile xregs = NULL;
893 volatile size_t xregs_size = 0;
894 gwindows_t *volatile gwp = NULL;
895 volatile int gwin_size = 0;
896 kfpu_t *fpp;
897 struct machpcb *mpcb;
898 volatile int watched = 0;
899 volatile int watched2 = 0;
900 caddr_t tos;
901
902 /*
903 * Make sure the current last user window has been flushed to
904 * the stack save area before we change the sp.
905 * Restore register window if a debugger modified it.
906 */
907 (void) flush_user_windows_to_stack(NULL);
908 if (lwp->lwp_pcb.pcb_xregstat != XREGNONE)
909 xregrestore(lwp, 0);
910
911 mpcb = lwptompcb(lwp);
912 rp = lwptoregs(lwp);
913
914 /*
915 * Clear the watchpoint return stack pointers.
916 */
917 mpcb->mpcb_rsp[0] = NULL;
918 mpcb->mpcb_rsp[1] = NULL;
919
920 minstacksz = sizeof (struct sigframe);
921
922 /*
923 * We know that sizeof (siginfo_t) is stack-aligned:
924 * 128 bytes for ILP32, 256 bytes for LP64.
925 */
926 if (sip != NULL)
927 minstacksz += sizeof (siginfo_t);
928
929 /*
930 * These two fields are pointed to by ABI structures and may
931 * be of arbitrary length. Size them now so we know how big
932 * the signal frame has to be.
933 */
934 fpp = lwptofpu(lwp);
935 fpp->fpu_fprs = _fp_read_fprs();
936 if ((fpp->fpu_en) || (fpp->fpu_fprs & FPRS_FEF)) {
937 fpq_size = fpp->fpu_q_entrysize * fpp->fpu_qcnt;
938 minstacksz += SA(fpq_size);
939 }
940
941 mpcb = lwptompcb(lwp);
942 if (mpcb->mpcb_wbcnt != 0) {
943 gwin_size = (mpcb->mpcb_wbcnt * sizeof (struct rwindow)) +
944 (SPARC_MAXREGWINDOW * sizeof (caddr_t)) + sizeof (long);
945 minstacksz += SA(gwin_size);
946 }
947
948 /*
949 * Extra registers, if support by this platform, may be of arbitrary
950 * length. Size them now so we know how big the signal frame has to be.
951 * For sparcv9 _LP64 user programs, use asrs instead of the xregs.
952 */
953 minstacksz += SA(xregs_size);
954
955 /*
956 * Figure out whether we will be handling this signal on
957 * an alternate stack specified by the user. Then allocate
958 * and validate the stack requirements for the signal handler
959 * context. on_fault will catch any faults.
960 */
961 newstack = (sigismember(&PTOU(curproc)->u_sigonstack, sig) &&
962 !(lwp->lwp_sigaltstack.ss_flags & (SS_ONSTACK|SS_DISABLE)));
963
964 tos = (caddr_t)rp->r_sp + STACK_BIAS;
965 /*
966 * Force proper stack pointer alignment, even in the face of a
967 * misaligned stack pointer from user-level before the signal.
968 * Don't use the SA() macro because that rounds up, not down.
969 */
970 tos = (caddr_t)((uintptr_t)tos & ~(STACK_ALIGN - 1ul));
971
972 if (newstack != 0) {
973 fp = (struct sigframe *)
974 (SA((uintptr_t)lwp->lwp_sigaltstack.ss_sp) +
975 SA((int)lwp->lwp_sigaltstack.ss_size) - STACK_ALIGN -
976 SA(minstacksz));
977 } else {
978 /*
979 * If we were unable to flush all register windows to
980 * the stack and we are not now on an alternate stack,
981 * just dump core with a SIGSEGV back in psig().
982 */
983 if (sig == SIGSEGV &&
984 mpcb->mpcb_wbcnt != 0 &&
985 !(lwp->lwp_sigaltstack.ss_flags & SS_ONSTACK))
986 return (0);
987 fp = (struct sigframe *)(tos - SA(minstacksz));
988 /*
989 * Could call grow here, but stack growth now handled below
990 * in code protected by on_fault().
991 */
992 }
993 sp = (caddr_t)fp + sizeof (struct sigframe);
994
995 /*
996 * Make sure process hasn't trashed its stack.
997 */
998 if ((caddr_t)fp >= p->p_usrstack ||
999 (caddr_t)fp + SA(minstacksz) >= p->p_usrstack) {
1000 #ifdef DEBUG
1001 printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n",
1002 PTOU(p)->u_comm, p->p_pid, sig);
1003 printf("sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n",
1004 (void *)fp, (void *)hdlr, rp->r_pc);
1005 printf("fp above USRSTACK\n");
1006 #endif
1007 return (0);
1008 }
1009
1010 watched = watch_disable_addr((caddr_t)fp, SA(minstacksz), S_WRITE);
1011 if (on_fault(&ljb))
1012 goto badstack;
1013
1014 tuc = kmem_alloc(sizeof (ucontext_t), KM_SLEEP);
1015 savecontext(tuc, &lwp->lwp_sigoldmask);
1016
1017 /*
1018 * save extra register state if it exists
1019 */
1020 if (xregs_size != 0) {
1021 xregs_setptr(lwp, tuc, sp);
1022 xregs = kmem_alloc(xregs_size, KM_SLEEP);
1023 xregs_get(lwp, xregs);
1024 copyout_noerr(xregs, sp, xregs_size);
1025 kmem_free(xregs, xregs_size);
1026 xregs = NULL;
1027 sp += SA(xregs_size);
1028 }
1029
1030 copyout_noerr(tuc, &fp->uc, sizeof (*tuc));
1031 kmem_free(tuc, sizeof (*tuc));
1032 tuc = NULL;
1033
1034 if (sip != NULL) {
1035 zoneid_t zoneid;
1036
1037 uzero(sp, sizeof (siginfo_t));
1038 if (SI_FROMUSER(sip) &&
1039 (zoneid = p->p_zone->zone_id) != GLOBAL_ZONEID &&
1040 zoneid != sip->si_zoneid) {
1041 k_siginfo_t sani_sip = *sip;
1042 sani_sip.si_pid = p->p_zone->zone_zsched->p_pid;
1043 sani_sip.si_uid = 0;
1044 sani_sip.si_ctid = -1;
1045 sani_sip.si_zoneid = zoneid;
1046 copyout_noerr(&sani_sip, sp, sizeof (sani_sip));
1047 } else {
1048 copyout_noerr(sip, sp, sizeof (*sip));
1049 }
1050 sip_addr = (siginfo_t *)sp;
1051 sp += sizeof (siginfo_t);
1052
1053 if (sig == SIGPROF &&
1054 curthread->t_rprof != NULL &&
1055 curthread->t_rprof->rp_anystate) {
1056 /*
1057 * We stand on our head to deal with
1058 * the real time profiling signal.
1059 * Fill in the stuff that doesn't fit
1060 * in a normal k_siginfo structure.
1061 */
1062 int i = sip->si_nsysarg;
1063 while (--i >= 0) {
1064 sulword_noerr(
1065 (ulong_t *)&sip_addr->si_sysarg[i],
1066 (ulong_t)lwp->lwp_arg[i]);
1067 }
1068 copyout_noerr(curthread->t_rprof->rp_state,
1069 sip_addr->si_mstate,
1070 sizeof (curthread->t_rprof->rp_state));
1071 }
1072 } else {
1073 sip_addr = (siginfo_t *)NULL;
1074 }
1075
1076 /*
1077 * When flush_user_windows_to_stack() can't save all the
1078 * windows to the stack, it puts them in the lwp's pcb.
1079 */
1080 if (gwin_size != 0) {
1081 gwp = kmem_alloc(gwin_size, KM_SLEEP);
1082 getgwins(lwp, gwp);
1083 sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)sp);
1084 copyout_noerr(gwp, sp, gwin_size);
1085 kmem_free(gwp, gwin_size);
1086 gwp = NULL;
1087 sp += SA(gwin_size);
1088 } else
1089 sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)NULL);
1090
1091 if (fpq_size != 0) {
1092 struct _fq *fqp = (struct _fq *)sp;
1093 sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)fqp);
1094 copyout_noerr(mpcb->mpcb_fpu_q, fqp, fpq_size);
1095
1096 /*
1097 * forget the fp queue so that the signal handler can run
1098 * without being harrassed--it will do a setcontext that will
1099 * re-establish the queue if there still is one
1100 *
1101 * NOTE: fp_runq() relies on the qcnt field being zeroed here
1102 * to terminate its processing of the queue after signal
1103 * delivery.
1104 */
1105 mpcb->mpcb_fpu->fpu_qcnt = 0;
1106 sp += SA(fpq_size);
1107
1108 /* Also, syscall needs to know about this */
1109 mpcb->mpcb_flags |= FP_TRAPPED;
1110
1111 } else {
1112 sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)NULL);
1113 suword8_noerr(&fp->uc.uc_mcontext.fpregs.fpu_qcnt, 0);
1114 }
1115
1116
1117 /*
1118 * Since we flushed the user's windows and we are changing his
1119 * stack pointer, the window that the user will return to will
1120 * be restored from the save area in the frame we are setting up.
1121 * We copy in save area for old stack pointer so that debuggers
1122 * can do a proper stack backtrace from the signal handler.
1123 */
1124 if (mpcb->mpcb_wbcnt == 0) {
1125 watched2 = watch_disable_addr(tos, sizeof (struct rwindow),
1126 S_READ);
1127 ucopy(tos, &fp->frwin, sizeof (struct rwindow));
1128 }
1129
1130 lwp->lwp_oldcontext = (uintptr_t)&fp->uc;
1131
1132 if (newstack != 0) {
1133 lwp->lwp_sigaltstack.ss_flags |= SS_ONSTACK;
1134
1135 if (lwp->lwp_ustack) {
1136 copyout_noerr(&lwp->lwp_sigaltstack,
1137 (stack_t *)lwp->lwp_ustack, sizeof (stack_t));
1138 }
1139 }
1140
1141 no_fault();
1142 mpcb->mpcb_wbcnt = 0; /* let user go on */
1143
1144 if (watched2)
1145 watch_enable_addr(tos, sizeof (struct rwindow), S_READ);
1146 if (watched)
1147 watch_enable_addr((caddr_t)fp, SA(minstacksz), S_WRITE);
1148
1149 /*
1150 * Set up user registers for execution of signal handler.
1151 */
1152 rp->r_sp = (uintptr_t)fp - STACK_BIAS;
1153 rp->r_pc = (uintptr_t)hdlr;
1154 rp->r_npc = (uintptr_t)hdlr + 4;
1155 /* make sure %asi is ASI_PNF */
1156 rp->r_tstate &= ~((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT);
1157 rp->r_tstate |= ((uint64_t)ASI_PNF << TSTATE_ASI_SHIFT);
1158 rp->r_o0 = sig;
1159 rp->r_o1 = (uintptr_t)sip_addr;
1160 rp->r_o2 = (uintptr_t)&fp->uc;
1161 /*
1162 * Don't set lwp_eosys here. sendsig() is called via psig() after
1163 * lwp_eosys is handled, so setting it here would affect the next
1164 * system call.
1165 */
1166 return (1);
1167
1168 badstack:
1169 no_fault();
1170 if (watched2)
1171 watch_enable_addr(tos, sizeof (struct rwindow), S_READ);
1172 if (watched)
1173 watch_enable_addr((caddr_t)fp, SA(minstacksz), S_WRITE);
1174 if (tuc)
1175 kmem_free(tuc, sizeof (ucontext_t));
1176 if (xregs)
1177 kmem_free(xregs, xregs_size);
1178 if (gwp)
1179 kmem_free(gwp, gwin_size);
1180 #ifdef DEBUG
1181 printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n",
1182 PTOU(p)->u_comm, p->p_pid, sig);
1183 printf("on fault, sigsp = %p, action = %p, upc = 0x%lx\n",
1184 (void *)fp, (void *)hdlr, rp->r_pc);
1185 #endif
1186 return (0);
1187 }
1188
1189
1190 #ifdef _SYSCALL32_IMPL
1191
1192 /*
1193 * Construct the execution environment for the user's signal
1194 * handler and arrange for control to be given to it on return
1195 * to userland. The library code now calls setcontext() to
1196 * clean up after the signal handler, so sigret() is no longer
1197 * needed.
1198 */
1199 int
1200 sendsig32(int sig, k_siginfo_t *sip, void (*hdlr)())
1201 {
1202 /*
1203 * 'volatile' is needed to ensure that values are
1204 * correct on the error return from on_fault().
1205 */
1206 volatile int minstacksz; /* min stack required to catch signal */
1207 int newstack = 0; /* if true, switching to altstack */
1208 label_t ljb;
1209 caddr_t sp;
1210 struct regs *volatile rp;
1211 klwp_t *lwp = ttolwp(curthread);
1212 proc_t *volatile p = ttoproc(curthread);
1213 struct fq32 fpu_q[MAXFPQ]; /* to hold floating queue */
1214 struct fq32 *dfq = NULL;
1215 size_t fpq_size = 0;
1216 struct sigframe32 {
1217 struct frame32 frwin;
1218 ucontext32_t uc;
1219 };
1220 struct sigframe32 *volatile fp;
1221 siginfo32_t *sip_addr;
1222 ucontext32_t *volatile tuc = NULL;
1223 char *volatile xregs = NULL;
1224 volatile int xregs_size = 0;
1225 gwindows32_t *volatile gwp = NULL;
1226 volatile size_t gwin_size = 0;
1227 kfpu_t *fpp;
1228 struct machpcb *mpcb;
1229 volatile int watched = 0;
1230 volatile int watched2 = 0;
1231 caddr_t tos;
1232
1233 /*
1234 * Make sure the current last user window has been flushed to
1235 * the stack save area before we change the sp.
1236 * Restore register window if a debugger modified it.
1237 */
1238 (void) flush_user_windows_to_stack(NULL);
1239 if (lwp->lwp_pcb.pcb_xregstat != XREGNONE)
1240 xregrestore(lwp, 0);
1241
1242 mpcb = lwptompcb(lwp);
1243 rp = lwptoregs(lwp);
1244
1245 /*
1246 * Clear the watchpoint return stack pointers.
1247 */
1248 mpcb->mpcb_rsp[0] = NULL;
1249 mpcb->mpcb_rsp[1] = NULL;
1250
1251 minstacksz = sizeof (struct sigframe32);
1252
1253 if (sip != NULL)
1254 minstacksz += sizeof (siginfo32_t);
1255
1256 /*
1257 * These two fields are pointed to by ABI structures and may
1258 * be of arbitrary length. Size them now so we know how big
1259 * the signal frame has to be.
1260 */
1261 fpp = lwptofpu(lwp);
1262 fpp->fpu_fprs = _fp_read_fprs();
1263 if ((fpp->fpu_en) || (fpp->fpu_fprs & FPRS_FEF)) {
1264 fpq_size = sizeof (struct fpq32) * fpp->fpu_qcnt;
1265 minstacksz += fpq_size;
1266 dfq = fpu_q;
1267 }
1268
1269 mpcb = lwptompcb(lwp);
1270 if (mpcb->mpcb_wbcnt != 0) {
1271 gwin_size = (mpcb->mpcb_wbcnt * sizeof (struct rwindow32)) +
1272 (SPARC_MAXREGWINDOW * sizeof (caddr32_t)) +
1273 sizeof (int32_t);
1274 minstacksz += gwin_size;
1275 }
1276
1277 /*
1278 * Extra registers, if supported by this platform, may be of arbitrary
1279 * length. Size them now so we know how big the signal frame has to be.
1280 */
1281 xregs_size = xregs_getsize(p);
1282 minstacksz += SA32(xregs_size);
1283
1284 /*
1285 * Figure out whether we will be handling this signal on
1286 * an alternate stack specified by the user. Then allocate
1287 * and validate the stack requirements for the signal handler
1288 * context. on_fault will catch any faults.
1289 */
1290 newstack = (sigismember(&PTOU(curproc)->u_sigonstack, sig) &&
1291 !(lwp->lwp_sigaltstack.ss_flags & (SS_ONSTACK|SS_DISABLE)));
1292
1293 tos = (void *)(uintptr_t)(uint32_t)rp->r_sp;
1294 /*
1295 * Force proper stack pointer alignment, even in the face of a
1296 * misaligned stack pointer from user-level before the signal.
1297 * Don't use the SA32() macro because that rounds up, not down.
1298 */
1299 tos = (caddr_t)((uintptr_t)tos & ~(STACK_ALIGN32 - 1ul));
1300
1301 if (newstack != 0) {
1302 fp = (struct sigframe32 *)
1303 (SA32((uintptr_t)lwp->lwp_sigaltstack.ss_sp) +
1304 SA32((int)lwp->lwp_sigaltstack.ss_size) -
1305 STACK_ALIGN32 -
1306 SA32(minstacksz));
1307 } else {
1308 /*
1309 * If we were unable to flush all register windows to
1310 * the stack and we are not now on an alternate stack,
1311 * just dump core with a SIGSEGV back in psig().
1312 */
1313 if (sig == SIGSEGV &&
1314 mpcb->mpcb_wbcnt != 0 &&
1315 !(lwp->lwp_sigaltstack.ss_flags & SS_ONSTACK))
1316 return (0);
1317 fp = (struct sigframe32 *)(tos - SA32(minstacksz));
1318 /*
1319 * Could call grow here, but stack growth now handled below
1320 * in code protected by on_fault().
1321 */
1322 }
1323 sp = (caddr_t)fp + sizeof (struct sigframe32);
1324
1325 /*
1326 * Make sure process hasn't trashed its stack.
1327 */
1328 if ((caddr_t)fp >= p->p_usrstack ||
1329 (caddr_t)fp + SA32(minstacksz) >= p->p_usrstack) {
1330 #ifdef DEBUG
1331 printf("sendsig32: bad signal stack cmd=%s, pid=%d, sig=%d\n",
1332 PTOU(p)->u_comm, p->p_pid, sig);
1333 printf("sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n",
1334 (void *)fp, (void *)hdlr, rp->r_pc);
1335 printf("fp above USRSTACK32\n");
1336 #endif
1337 return (0);
1338 }
1339
1340 watched = watch_disable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE);
1341 if (on_fault(&ljb))
1342 goto badstack;
1343
1344 tuc = kmem_alloc(sizeof (ucontext32_t), KM_SLEEP);
1345 savecontext32(tuc, &lwp->lwp_sigoldmask, dfq);
1346
1347 /*
1348 * save extra register state if it exists
1349 */
1350 if (xregs_size != 0) {
1351 xregs_setptr32(lwp, tuc, (caddr32_t)(uintptr_t)sp);
1352 xregs = kmem_alloc(xregs_size, KM_SLEEP);
1353 xregs_get(lwp, xregs);
1354 copyout_noerr(xregs, sp, xregs_size);
1355 kmem_free(xregs, xregs_size);
1356 xregs = NULL;
1357 sp += SA32(xregs_size);
1358 }
1359
1360 copyout_noerr(tuc, &fp->uc, sizeof (*tuc));
1361 kmem_free(tuc, sizeof (*tuc));
1362 tuc = NULL;
1363
1364 if (sip != NULL) {
1365 siginfo32_t si32;
1366 zoneid_t zoneid;
1367
1368 siginfo_kto32(sip, &si32);
1369 if (SI_FROMUSER(sip) &&
1370 (zoneid = p->p_zone->zone_id) != GLOBAL_ZONEID &&
1371 zoneid != sip->si_zoneid) {
1372 si32.si_pid = p->p_zone->zone_zsched->p_pid;
1373 si32.si_uid = 0;
1374 si32.si_ctid = -1;
1375 si32.si_zoneid = zoneid;
1376 }
1377 uzero(sp, sizeof (siginfo32_t));
1378 copyout_noerr(&si32, sp, sizeof (siginfo32_t));
1379 sip_addr = (siginfo32_t *)sp;
1380 sp += sizeof (siginfo32_t);
1381
1382 if (sig == SIGPROF &&
1383 curthread->t_rprof != NULL &&
1384 curthread->t_rprof->rp_anystate) {
1385 /*
1386 * We stand on our head to deal with
1387 * the real time profiling signal.
1388 * Fill in the stuff that doesn't fit
1389 * in a normal k_siginfo structure.
1390 */
1391 int i = sip->si_nsysarg;
1392 while (--i >= 0) {
1393 suword32_noerr(&sip_addr->si_sysarg[i],
1394 (uint32_t)lwp->lwp_arg[i]);
1395 }
1396 copyout_noerr(curthread->t_rprof->rp_state,
1397 sip_addr->si_mstate,
1398 sizeof (curthread->t_rprof->rp_state));
1399 }
1400 } else {
1401 sip_addr = NULL;
1402 }
1403
1404 /*
1405 * When flush_user_windows_to_stack() can't save all the
1406 * windows to the stack, it puts them in the lwp's pcb.
1407 */
1408 if (gwin_size != 0) {
1409 gwp = kmem_alloc(gwin_size, KM_SLEEP);
1410 getgwins32(lwp, gwp);
1411 suword32_noerr(&fp->uc.uc_mcontext.gwins,
1412 (uint32_t)(uintptr_t)sp);
1413 copyout_noerr(gwp, sp, gwin_size);
1414 kmem_free(gwp, gwin_size);
1415 gwp = NULL;
1416 sp += gwin_size;
1417 } else {
1418 suword32_noerr(&fp->uc.uc_mcontext.gwins, (uint32_t)NULL);
1419 }
1420
1421 if (fpq_size != 0) {
1422 /*
1423 * Update the (already copied out) fpu32.fpu_q pointer
1424 * from NULL to the 32-bit address on the user's stack
1425 * where we then copyout the fq32 to.
1426 */
1427 struct fq32 *fqp = (struct fq32 *)sp;
1428 suword32_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q,
1429 (uint32_t)(uintptr_t)fqp);
1430 copyout_noerr(dfq, fqp, fpq_size);
1431
1432 /*
1433 * forget the fp queue so that the signal handler can run
1434 * without being harrassed--it will do a setcontext that will
1435 * re-establish the queue if there still is one
1436 *
1437 * NOTE: fp_runq() relies on the qcnt field being zeroed here
1438 * to terminate its processing of the queue after signal
1439 * delivery.
1440 */
1441 mpcb->mpcb_fpu->fpu_qcnt = 0;
1442 sp += fpq_size;
1443
1444 /* Also, syscall needs to know about this */
1445 mpcb->mpcb_flags |= FP_TRAPPED;
1446
1447 } else {
1448 suword32_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q,
1449 (uint32_t)NULL);
1450 suword8_noerr(&fp->uc.uc_mcontext.fpregs.fpu_qcnt, 0);
1451 }
1452
1453
1454 /*
1455 * Since we flushed the user's windows and we are changing his
1456 * stack pointer, the window that the user will return to will
1457 * be restored from the save area in the frame we are setting up.
1458 * We copy in save area for old stack pointer so that debuggers
1459 * can do a proper stack backtrace from the signal handler.
1460 */
1461 if (mpcb->mpcb_wbcnt == 0) {
1462 watched2 = watch_disable_addr(tos, sizeof (struct rwindow32),
1463 S_READ);
1464 ucopy(tos, &fp->frwin, sizeof (struct rwindow32));
1465 }
1466
1467 lwp->lwp_oldcontext = (uintptr_t)&fp->uc;
1468
1469 if (newstack != 0) {
1470 lwp->lwp_sigaltstack.ss_flags |= SS_ONSTACK;
1471 if (lwp->lwp_ustack) {
1472 stack32_t stk32;
1473
1474 stk32.ss_sp =
1475 (caddr32_t)(uintptr_t)lwp->lwp_sigaltstack.ss_sp;
1476 stk32.ss_size = (size32_t)lwp->lwp_sigaltstack.ss_size;
1477 stk32.ss_flags = (int32_t)lwp->lwp_sigaltstack.ss_flags;
1478
1479 copyout_noerr(&stk32, (stack32_t *)lwp->lwp_ustack,
1480 sizeof (stack32_t));
1481 }
1482 }
1483
1484 no_fault();
1485 mpcb->mpcb_wbcnt = 0; /* let user go on */
1486
1487 if (watched2)
1488 watch_enable_addr(tos, sizeof (struct rwindow32), S_READ);
1489 if (watched)
1490 watch_enable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE);
1491
1492 /*
1493 * Set up user registers for execution of signal handler.
1494 */
1495 rp->r_sp = (uintptr_t)fp;
1496 rp->r_pc = (uintptr_t)hdlr;
1497 rp->r_npc = (uintptr_t)hdlr + 4;
1498 /* make sure %asi is ASI_PNF */
1499 rp->r_tstate &= ~((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT);
1500 rp->r_tstate |= ((uint64_t)ASI_PNF << TSTATE_ASI_SHIFT);
1501 rp->r_o0 = sig;
1502 rp->r_o1 = (uintptr_t)sip_addr;
1503 rp->r_o2 = (uintptr_t)&fp->uc;
1504 /*
1505 * Don't set lwp_eosys here. sendsig() is called via psig() after
1506 * lwp_eosys is handled, so setting it here would affect the next
1507 * system call.
1508 */
1509 return (1);
1510
1511 badstack:
1512 no_fault();
1513 if (watched2)
1514 watch_enable_addr(tos, sizeof (struct rwindow32), S_READ);
1515 if (watched)
1516 watch_enable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE);
1517 if (tuc)
1518 kmem_free(tuc, sizeof (*tuc));
1519 if (xregs)
1520 kmem_free(xregs, xregs_size);
1521 if (gwp)
1522 kmem_free(gwp, gwin_size);
1523 #ifdef DEBUG
1524 printf("sendsig32: bad signal stack cmd=%s, pid=%d, sig=%d\n",
1525 PTOU(p)->u_comm, p->p_pid, sig);
1526 printf("on fault, sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n",
1527 (void *)fp, (void *)hdlr, rp->r_pc);
1528 #endif
1529 return (0);
1530 }
1531
1532 #endif /* _SYSCALL32_IMPL */
1533
1534
1535 /*
1536 * Load user registers into lwp. Called only from syslwp_create().
1537 * thrptr ignored for sparc.
1538 */
1539 /* ARGSUSED2 */
1540 void
1541 lwp_load(klwp_t *lwp, gregset_t grp, uintptr_t thrptr)
1542 {
1543 setgregs(lwp, grp);
1544 if (lwptoproc(lwp)->p_model == DATAMODEL_ILP32)
1545 lwptoregs(lwp)->r_tstate = TSTATE_USER32 | TSTATE_MM_TSO;
1546 else
1547 lwptoregs(lwp)->r_tstate = TSTATE_USER64 | TSTATE_MM_TSO;
1548
1549 if (!fpu_exists)
1550 lwptoregs(lwp)->r_tstate &= ~TSTATE_PEF;
1551 lwp->lwp_eosys = JUSTRETURN;
1552 lwptot(lwp)->t_post_sys = 1;
1553 }
1554
1555 /*
1556 * set syscall()'s return values for a lwp.
1557 */
1558 void
1559 lwp_setrval(klwp_t *lwp, int v1, int v2)
1560 {
1561 struct regs *rp = lwptoregs(lwp);
1562
1563 rp->r_tstate &= ~TSTATE_IC;
1564 rp->r_o0 = v1;
1565 rp->r_o1 = v2;
1566 }
1567
1568 /*
1569 * set stack pointer for a lwp
1570 */
1571 void
1572 lwp_setsp(klwp_t *lwp, caddr_t sp)
1573 {
1574 struct regs *rp = lwptoregs(lwp);
1575 rp->r_sp = (uintptr_t)sp;
1576 }
1577
1578 /*
1579 * Take any PCB specific actions that are required or flagged in the PCB.
1580 */
1581 extern void trap_async_hwerr(void);
1582 #pragma weak trap_async_hwerr
1583
1584 void
1585 lwp_pcb_exit(void)
1586 {
1587 klwp_t *lwp = ttolwp(curthread);
1588
1589 if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) {
1590 lwp->lwp_pcb.pcb_flags &= ~ASYNC_HWERR;
1591 trap_async_hwerr();
1592 }
1593 }
1594
1595 /*
1596 * Invalidate the saved user register windows in the pcb struct
1597 * for the current thread. They will no longer be preserved.
1598 */
1599 void
1600 lwp_clear_uwin(void)
1601 {
1602 struct machpcb *m = lwptompcb(ttolwp(curthread));
1603
1604 /*
1605 * This has the effect of invalidating all (any) of the
1606 * user level windows that are currently sitting in the
1607 * kernel buffer.
1608 */
1609 m->mpcb_wbcnt = 0;
1610 }
1611
1612 /*
1613 * Set memory model to Total Store Order (TSO).
1614 */
1615 static void
1616 mmodel_set_tso(void)
1617 {
1618 struct regs *rp = lwptoregs(ttolwp(curthread));
1619
1620 /*
1621 * The thread is doing something which requires TSO semantics
1622 * (creating a 2nd thread, or mapping writable shared memory).
1623 * It's no longer safe to run in WC mode.
1624 */
1625 rp->r_tstate &= ~TSTATE_MM;
1626 /* LINTED E_EXPR_NULL_EFFECT */
1627 rp->r_tstate |= TSTATE_MM_TSO;
1628 }
1629
1630 /*
1631 * When this routine is invoked, the process is just about to add a new lwp;
1632 * making it multi threaded.
1633 *
1634 * If the program requires default stronger/legacy memory model semantics,
1635 * this is an indication that the processor memory model
1636 * should be altered to provide those semantics.
1637 */
1638 void
1639 lwp_mmodel_newlwp(void)
1640 {
1641 /*
1642 * New thread has been created and it's no longer safe
1643 * to run in WC mode, so revert back to TSO.
1644 */
1645 mmodel_set_tso();
1646 }
1647
1648 /*
1649 * This routine is invoked immediately after the lwp has added a mapping
1650 * to shared memory to its address space. The mapping starts at address
1651 * 'addr' and extends for 'size' bytes.
1652 *
1653 * Unless we can (somehow) guarantee that all the processes we're sharing
1654 * the underlying mapped object with, are using the same memory model that
1655 * this process is using, this call should change the memory model
1656 * configuration of the processor to be the most pessimistic available.
1657 */
1658 /* ARGSUSED */
1659 void
1660 lwp_mmodel_shared_as(caddr_t addr, size_t sz)
1661 {
1662 /*
1663 * lwp has mapped shared memory and is no longer safe
1664 * to run in WC mode, so revert back to TSO.
1665 * For now, any shared memory access is enough to get back to TSO
1666 * and hence not checking on 'addr' & 'sz'.
1667 */
1668 mmodel_set_tso();
1669 }
1670
1671 static uint_t
1672 mkpsr(uint64_t tstate, uint_t fprs)
1673 {
1674 uint_t psr, icc;
1675
1676 psr = tstate & TSTATE_CWP_MASK;
1677 if (tstate & TSTATE_PRIV)
1678 psr |= PSR_PS;
1679 if (fprs & FPRS_FEF)
1680 psr |= PSR_EF;
1681 icc = (uint_t)(tstate >> PSR_TSTATE_CC_SHIFT) & PSR_ICC;
1682 psr |= icc;
1683 psr |= V9_PSR_IMPLVER;
1684 return (psr);
1685 }
1686
1687 void
1688 sync_icache(caddr_t va, uint_t len)
1689 {
1690 caddr_t end;
1691
1692 end = va + len;
1693 va = (caddr_t)((uintptr_t)va & -8l); /* sparc needs 8-byte align */
1694 while (va < end) {
1695 doflush(va);
1696 va += 8;
1697 }
1698 }
1699
1700 #ifdef _SYSCALL32_IMPL
1701
1702 /*
1703 * Copy the floating point queue if and only if there is a queue and a place
1704 * to copy it to. Let xregs take care of the other fp regs, for v8plus.
1705 * The issue is that while we are handling the fq32 in sendsig, we
1706 * still need a 64-bit pointer to it, and the caddr32_t in fpregset32_t
1707 * will not suffice, so we have the third parameter to this function.
1708 */
1709 void
1710 fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq)
1711 {
1712 int i;
1713
1714 bzero(dest, sizeof (*dest));
1715 for (i = 0; i < 32; i++)
1716 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i];
1717 dest->fpu_q = NULL;
1718 dest->fpu_fsr = (uint32_t)src->fpu_fsr;
1719 dest->fpu_qcnt = src->fpu_qcnt;
1720 dest->fpu_q_entrysize = sizeof (struct fpq32);
1721 dest->fpu_en = src->fpu_en;
1722
1723 if ((src->fpu_qcnt) && (dfq != NULL)) {
1724 struct _fq *sfq = src->fpu_q;
1725 for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) {
1726 dfq->FQu.fpq.fpq_addr =
1727 (caddr32_t)(uintptr_t)sfq->FQu.fpq.fpq_addr;
1728 dfq->FQu.fpq.fpq_instr = sfq->FQu.fpq.fpq_instr;
1729 }
1730 }
1731 }
1732
1733 /*
1734 * Copy the floating point queue if and only if there is a queue and a place
1735 * to copy it to. Let xregs take care of the other fp regs, for v8plus.
1736 * The *dfq is required to escape the bzero in both this function and in
1737 * ucontext_32ton. The *sfq is required because once the fq32 is copied
1738 * into the kernel, in setcontext, then we need a 64-bit pointer to it.
1739 */
1740 static void
1741 fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
1742 const struct fq32 *sfq, struct _fq *dfq)
1743 {
1744 int i;
1745
1746 bzero(dest, sizeof (*dest));
1747 for (i = 0; i < 32; i++)
1748 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i];
1749 dest->fpu_q = dfq;
1750 dest->fpu_fsr = (uint64_t)src->fpu_fsr;
1751 if ((dest->fpu_qcnt = src->fpu_qcnt) > 0)
1752 dest->fpu_q_entrysize = sizeof (struct _fpq);
1753 else
1754 dest->fpu_q_entrysize = 0;
1755 dest->fpu_en = src->fpu_en;
1756
1757 if ((src->fpu_qcnt) && (sfq) && (dfq)) {
1758 for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) {
1759 dfq->FQu.fpq.fpq_addr =
1760 (unsigned int *)(uintptr_t)sfq->FQu.fpq.fpq_addr;
1761 dfq->FQu.fpq.fpq_instr = sfq->FQu.fpq.fpq_instr;
1762 }
1763 }
1764 }
1765
1766 void
1767 ucontext_32ton(const ucontext32_t *src, ucontext_t *dest,
1768 const struct fq32 *sfq, struct _fq *dfq)
1769 {
1770 int i;
1771
1772 bzero(dest, sizeof (*dest));
1773
1774 dest->uc_flags = src->uc_flags;
1775 dest->uc_link = (ucontext_t *)(uintptr_t)src->uc_link;
1776
1777 for (i = 0; i < 4; i++) {
1778 dest->uc_sigmask.__sigbits[i] = src->uc_sigmask.__sigbits[i];
1779 }
1780
1781 dest->uc_stack.ss_sp = (void *)(uintptr_t)src->uc_stack.ss_sp;
1782 dest->uc_stack.ss_size = (size_t)src->uc_stack.ss_size;
1783 dest->uc_stack.ss_flags = src->uc_stack.ss_flags;
1784
1785 /* REG_CCR is 0, skip over it and handle it after this loop */
1786 for (i = 1; i < _NGREG32; i++)
1787 dest->uc_mcontext.gregs[i] =
1788 (greg_t)(uint32_t)src->uc_mcontext.gregs[i];
1789 dest->uc_mcontext.gregs[REG_CCR] =
1790 (src->uc_mcontext.gregs[REG_PSR] & PSR_ICC) >> PSR_ICC_SHIFT;
1791 dest->uc_mcontext.gregs[REG_ASI] = ASI_PNF;
1792 /*
1793 * A valid fpregs is only copied in if (uc.uc_flags & UC_FPU),
1794 * otherwise there is no guarantee that anything in fpregs is valid.
1795 */
1796 if (src->uc_flags & UC_FPU) {
1797 dest->uc_mcontext.gregs[REG_FPRS] =
1798 ((src->uc_mcontext.fpregs.fpu_en) ?
1799 (FPRS_DU|FPRS_DL|FPRS_FEF) : 0);
1800 } else {
1801 dest->uc_mcontext.gregs[REG_FPRS] = 0;
1802 }
1803 dest->uc_mcontext.gwins =
1804 (gwindows_t *)(uintptr_t)src->uc_mcontext.gwins;
1805 if (src->uc_flags & UC_FPU) {
1806 fpuregset_32ton(&src->uc_mcontext.fpregs,
1807 &dest->uc_mcontext.fpregs, sfq, dfq);
1808 }
1809 }
1810
1811 void
1812 rwindow_nto32(struct rwindow *src, struct rwindow32 *dest)
1813 {
1814 greg_t *s = (greg_t *)src;
1815 greg32_t *d = (greg32_t *)dest;
1816 int i;
1817
1818 for (i = 0; i < 16; i++)
1819 *d++ = (greg32_t)*s++;
1820 }
1821
1822 void
1823 rwindow_32ton(struct rwindow32 *src, struct rwindow *dest)
1824 {
1825 greg32_t *s = (greg32_t *)src;
1826 greg_t *d = (greg_t *)dest;
1827 int i;
1828
1829 for (i = 0; i < 16; i++)
1830 *d++ = (uint32_t)*s++;
1831 }
1832
1833 #endif /* _SYSCALL32_IMPL */
1834
1835 /*
1836 * The panic code invokes panic_saveregs() to record the contents of a
1837 * regs structure into the specified panic_data structure for debuggers.
1838 */
1839 void
1840 panic_saveregs(panic_data_t *pdp, struct regs *rp)
1841 {
1842 panic_nv_t *pnv = PANICNVGET(pdp);
1843
1844 PANICNVADD(pnv, "tstate", rp->r_tstate);
1845 PANICNVADD(pnv, "g1", rp->r_g1);
1846 PANICNVADD(pnv, "g2", rp->r_g2);
1847 PANICNVADD(pnv, "g3", rp->r_g3);
1848 PANICNVADD(pnv, "g4", rp->r_g4);
1849 PANICNVADD(pnv, "g5", rp->r_g5);
1850 PANICNVADD(pnv, "g6", rp->r_g6);
1851 PANICNVADD(pnv, "g7", rp->r_g7);
1852 PANICNVADD(pnv, "o0", rp->r_o0);
1853 PANICNVADD(pnv, "o1", rp->r_o1);
1854 PANICNVADD(pnv, "o2", rp->r_o2);
1855 PANICNVADD(pnv, "o3", rp->r_o3);
1856 PANICNVADD(pnv, "o4", rp->r_o4);
1857 PANICNVADD(pnv, "o5", rp->r_o5);
1858 PANICNVADD(pnv, "o6", rp->r_o6);
1859 PANICNVADD(pnv, "o7", rp->r_o7);
1860 PANICNVADD(pnv, "pc", (ulong_t)rp->r_pc);
1861 PANICNVADD(pnv, "npc", (ulong_t)rp->r_npc);
1862 PANICNVADD(pnv, "y", (uint32_t)rp->r_y);
1863
1864 PANICNVSET(pdp, pnv);
1865 }