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6263 add missing cc clobbers to intel atomic inlines

@@ -21,10 +21,11 @@
  */
 /*
  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  * Copyright 2014 Nexenta Systems, Inc.  All rights reserved.
+ * Copyright 2015 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  */
 
 #ifndef _ASM_ATOMIC_H
 #define _ASM_ATOMIC_H
 

@@ -80,11 +81,13 @@
 extern __GNU_INLINE void                                                \
 fxn(volatile type *target)                                              \
 {                                                                       \
         __asm__ __volatile__(                                           \
             "lock; " op " %0"                                           \
-            : "+m" (*target));                                          \
+            : "+m" (*target)                                            \
+            : /* no inputs */                                           \
+            : "cc");                                                    \
 }
 
 __ATOMIC_OPXX(atomic_inc_8,      uint8_t,  "inc" SUF_8)
 __ATOMIC_OPXX(atomic_inc_16,     uint16_t, "inc" SUF_16)
 __ATOMIC_OPXX(atomic_inc_32,     uint32_t, "inc" SUF_32)

@@ -110,11 +113,12 @@
 fxn(volatile type1 *target, type2 delta)                                \
 {                                                                       \
         __asm__ __volatile__(                                           \
             "lock; " op " %1,%0"                                        \
             : "+m" (*target)                                            \
-            : "i" reg (delta));                                         \
+            : "i" reg (delta)                                           \
+            : "cc");                                                    \
 }
 
 __ATOMIC_OPXX(atomic_add_8,     uint8_t,  int8_t,      "add" SUF_8,    "q")
 __ATOMIC_OPXX(atomic_add_16,    uint16_t, int16_t,     "add" SUF_16,   "r")
 __ATOMIC_OPXX(atomic_add_32,    uint32_t, int32_t,     "add" SUF_32,   "r")

@@ -135,11 +139,12 @@
         volatile void **tmp = (volatile void **)target;
 
         __asm__ __volatile__(
             "lock; add" SUF_PTR " %1,%0"
             : "+m" (*tmp)
-            : "ir" (delta));
+            : "ir" (delta)
+            : "cc");
 }
 
 __ATOMIC_OPXX(atomic_or_8,       uint8_t,  uint8_t,  "or" SUF_8,    "q")
 __ATOMIC_OPXX(atomic_or_16,      uint16_t, uint16_t, "or" SUF_16,   "r")
 __ATOMIC_OPXX(atomic_or_32,      uint32_t, uint32_t, "or" SUF_32,   "r")