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5255 uts shouldn't open-code ISP2
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--- old/usr/src/uts/sun4/os/ddi_impl.c
+++ new/usr/src/uts/sun4/os/ddi_impl.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26 /*
27 27 * Copyright 2014 Garrett D'Amore <garrett@damore.org>
28 28 */
29 29
30 30 /*
31 31 * sun4 specific DDI implementation
32 32 */
33 33 #include <sys/cpuvar.h>
34 34 #include <sys/ddi_subrdefs.h>
35 35 #include <sys/machsystm.h>
36 36 #include <sys/sunndi.h>
37 37 #include <sys/sysmacros.h>
38 38 #include <sys/ontrap.h>
39 39 #include <vm/seg_kmem.h>
40 40 #include <sys/membar.h>
41 41 #include <sys/dditypes.h>
42 42 #include <sys/ndifm.h>
43 43 #include <sys/fm/io/ddi.h>
44 44 #include <sys/ivintr.h>
45 45 #include <sys/bootconf.h>
46 46 #include <sys/conf.h>
47 47 #include <sys/ethernet.h>
48 48 #include <sys/idprom.h>
49 49 #include <sys/promif.h>
50 50 #include <sys/prom_plat.h>
51 51 #include <sys/systeminfo.h>
52 52 #include <sys/fpu/fpusystm.h>
53 53 #include <sys/vm.h>
54 54 #include <sys/ddi_isa.h>
55 55 #include <sys/modctl.h>
56 56
57 57 dev_info_t *get_intr_parent(dev_info_t *, dev_info_t *,
58 58 ddi_intr_handle_impl_t *);
59 59 #pragma weak get_intr_parent
60 60
61 61 int process_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t,
62 62 ddi_intr_handle_impl_t *, void *);
63 63 #pragma weak process_intr_ops
64 64
65 65 void cells_1275_copy(prop_1275_cell_t *, prop_1275_cell_t *, int32_t);
66 66 prop_1275_cell_t *cells_1275_cmp(prop_1275_cell_t *, prop_1275_cell_t *,
67 67 int32_t len);
68 68 #pragma weak cells_1275_copy
69 69
70 70 /*
71 71 * Wrapper for ddi_prop_lookup_int_array().
72 72 * This is handy because it returns the prop length in
73 73 * bytes which is what most of the callers require.
74 74 */
75 75
76 76 static int
77 77 get_prop_int_array(dev_info_t *di, char *pname, int **pval, uint_t *plen)
78 78 {
79 79 int ret;
80 80
81 81 if ((ret = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, di,
82 82 DDI_PROP_DONTPASS, pname, pval, plen)) == DDI_PROP_SUCCESS) {
83 83 *plen = (*plen) * (uint_t)sizeof (int);
84 84 }
85 85 return (ret);
86 86 }
87 87
88 88 /*
89 89 * SECTION: DDI Node Configuration
90 90 */
91 91
92 92 /*
93 93 * init_regspec_64:
94 94 *
95 95 * If the parent #size-cells is 2, convert the upa-style or
96 96 * safari-style reg property from 2-size cells to 1 size cell
97 97 * format, ignoring the size_hi, which must be zero for devices.
98 98 * (It won't be zero in the memory list properties in the memory
99 99 * nodes, but that doesn't matter here.)
100 100 */
101 101 struct ddi_parent_private_data *
102 102 init_regspec_64(dev_info_t *dip)
103 103 {
104 104 struct ddi_parent_private_data *pd;
105 105 dev_info_t *parent;
106 106 int size_cells;
107 107
108 108 /*
109 109 * If there are no "reg"s in the child node, return.
110 110 */
111 111 pd = ddi_get_parent_data(dip);
112 112 if ((pd == NULL) || (pd->par_nreg == 0)) {
113 113 return (pd);
114 114 }
115 115 parent = ddi_get_parent(dip);
116 116
117 117 size_cells = ddi_prop_get_int(DDI_DEV_T_ANY, parent,
118 118 DDI_PROP_DONTPASS, "#size-cells", 1);
119 119
120 120 if (size_cells != 1) {
121 121
122 122 int n, j;
123 123 struct regspec *irp;
124 124 struct reg_64 {
125 125 uint_t addr_hi, addr_lo, size_hi, size_lo;
126 126 };
127 127 struct reg_64 *r64_rp;
128 128 struct regspec *rp;
129 129 uint_t len = 0;
130 130 int *reg_prop;
131 131
132 132 ASSERT(size_cells == 2);
133 133
134 134 /*
135 135 * We already looked the property up once before if
136 136 * pd is non-NULL.
137 137 */
138 138 (void) ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip,
139 139 DDI_PROP_DONTPASS, OBP_REG, ®_prop, &len);
140 140 ASSERT(len != 0);
141 141
142 142 n = sizeof (struct reg_64) / sizeof (int);
143 143 n = len / n;
144 144
145 145 /*
146 146 * We're allocating a buffer the size of the PROM's property,
147 147 * but we're only using a smaller portion when we assign it
148 148 * to a regspec. We do this so that in the
149 149 * impl_ddi_sunbus_removechild function, we will
150 150 * always free the right amount of memory.
151 151 */
152 152 irp = rp = (struct regspec *)reg_prop;
153 153 r64_rp = (struct reg_64 *)pd->par_reg;
154 154
155 155 for (j = 0; j < n; ++j, ++rp, ++r64_rp) {
156 156 ASSERT(r64_rp->size_hi == 0);
157 157 rp->regspec_bustype = r64_rp->addr_hi;
158 158 rp->regspec_addr = r64_rp->addr_lo;
159 159 rp->regspec_size = r64_rp->size_lo;
160 160 }
161 161
162 162 ddi_prop_free((void *)pd->par_reg);
163 163 pd->par_nreg = n;
164 164 pd->par_reg = irp;
165 165 }
166 166 return (pd);
167 167 }
168 168
169 169 /*
170 170 * Create a ddi_parent_private_data structure from the ddi properties of
171 171 * the dev_info node.
172 172 *
173 173 * The "reg" is required if the driver wishes to create mappings on behalf
174 174 * of the device. The "reg" property is assumed to be a list of at least
175 175 * one triplet
176 176 *
177 177 * <bustype, address, size>*1
178 178 *
179 179 * The "interrupt" property is no longer part of parent private data on
180 180 * sun4u. The interrupt parent is may not be the device tree parent.
181 181 *
182 182 * The "ranges" property describes the mapping of child addresses to parent
183 183 * addresses.
184 184 *
185 185 * N.B. struct rangespec is defined for the following default values:
186 186 * parent child
187 187 * #address-cells 2 2
188 188 * #size-cells 1 1
189 189 * This function doesn't deal with non-default cells and will not create
190 190 * ranges in such cases.
191 191 */
192 192 void
193 193 make_ddi_ppd(dev_info_t *child, struct ddi_parent_private_data **ppd)
194 194 {
195 195 struct ddi_parent_private_data *pdptr;
196 196 int *reg_prop, *rng_prop;
197 197 uint_t reg_len = 0, rng_len = 0;
198 198 dev_info_t *parent;
199 199 int parent_addr_cells, parent_size_cells;
200 200 int child_addr_cells, child_size_cells;
201 201
202 202 *ppd = pdptr = kmem_zalloc(sizeof (*pdptr), KM_SLEEP);
203 203
204 204 /*
205 205 * root node has no parent private data, so *ppd should
206 206 * be initialized for naming to work properly.
207 207 */
208 208 if ((parent = ddi_get_parent(child)) == NULL)
209 209 return;
210 210
211 211 /*
212 212 * Set reg field of parent data from "reg" property
213 213 */
214 214 if ((get_prop_int_array(child, OBP_REG, ®_prop, ®_len)
215 215 == DDI_PROP_SUCCESS) && (reg_len != 0)) {
216 216 pdptr->par_nreg = (int)(reg_len / sizeof (struct regspec));
217 217 pdptr->par_reg = (struct regspec *)reg_prop;
218 218 }
219 219
220 220 /*
221 221 * "ranges" property ...
222 222 *
223 223 * This function does not handle cases where #address-cells != 2
224 224 * and * min(parent, child) #size-cells != 1 (see bugid 4211124).
225 225 *
226 226 * Nexus drivers with such exceptions (e.g. pci ranges)
227 227 * should either create a separate function for handling
228 228 * ranges or not use parent private data to store ranges.
229 229 */
230 230
231 231 /* root node has no ranges */
232 232 if ((parent = ddi_get_parent(child)) == NULL)
233 233 return;
234 234
235 235 child_addr_cells = ddi_prop_get_int(DDI_DEV_T_ANY, child,
236 236 DDI_PROP_DONTPASS, "#address-cells", 2);
237 237 child_size_cells = ddi_prop_get_int(DDI_DEV_T_ANY, child,
238 238 DDI_PROP_DONTPASS, "#size-cells", 1);
239 239 parent_addr_cells = ddi_prop_get_int(DDI_DEV_T_ANY, parent,
240 240 DDI_PROP_DONTPASS, "#address-cells", 2);
241 241 parent_size_cells = ddi_prop_get_int(DDI_DEV_T_ANY, parent,
242 242 DDI_PROP_DONTPASS, "#size-cells", 1);
243 243 if (child_addr_cells != 2 || parent_addr_cells != 2 ||
244 244 (child_size_cells != 1 && parent_size_cells != 1)) {
245 245 NDI_CONFIG_DEBUG((CE_NOTE, "!ranges not made in parent data; "
246 246 "#address-cells or #size-cells have non-default value"));
247 247 return;
248 248 }
249 249
250 250 if (get_prop_int_array(child, OBP_RANGES, &rng_prop, &rng_len)
251 251 == DDI_PROP_SUCCESS) {
252 252 pdptr->par_nrng = rng_len / (int)(sizeof (struct rangespec));
253 253 pdptr->par_rng = (struct rangespec *)rng_prop;
254 254 }
255 255 }
256 256
257 257 /*
258 258 * Free ddi_parent_private_data structure
259 259 */
260 260 void
261 261 impl_free_ddi_ppd(dev_info_t *dip)
262 262 {
263 263 struct ddi_parent_private_data *pdptr = ddi_get_parent_data(dip);
264 264
265 265 if (pdptr == NULL)
266 266 return;
267 267
268 268 if (pdptr->par_nrng != 0)
269 269 ddi_prop_free((void *)pdptr->par_rng);
270 270
271 271 if (pdptr->par_nreg != 0)
272 272 ddi_prop_free((void *)pdptr->par_reg);
273 273
274 274 kmem_free(pdptr, sizeof (*pdptr));
275 275 ddi_set_parent_data(dip, NULL);
276 276 }
277 277
278 278 /*
279 279 * Name a child of sun busses based on the reg spec.
280 280 * Handles the following properties:
281 281 *
282 282 * Property value
283 283 * Name type
284 284 *
285 285 * reg register spec
286 286 * interrupts new (bus-oriented) interrupt spec
287 287 * ranges range spec
288 288 *
289 289 * This may be called multiple times, independent of
290 290 * initchild calls.
291 291 */
292 292 static int
293 293 impl_sunbus_name_child(dev_info_t *child, char *name, int namelen)
294 294 {
295 295 struct ddi_parent_private_data *pdptr;
296 296 struct regspec *rp;
297 297
298 298 /*
299 299 * Fill in parent-private data and this function returns to us
300 300 * an indication if it used "registers" to fill in the data.
301 301 */
302 302 if (ddi_get_parent_data(child) == NULL) {
303 303 make_ddi_ppd(child, &pdptr);
304 304 ddi_set_parent_data(child, pdptr);
305 305 }
306 306
307 307 /*
308 308 * No reg property, return null string as address
309 309 * (e.g. root node)
310 310 */
311 311 name[0] = '\0';
312 312 if (sparc_pd_getnreg(child) == 0) {
313 313 return (DDI_SUCCESS);
314 314 }
315 315
316 316 rp = sparc_pd_getreg(child, 0);
317 317 (void) snprintf(name, namelen, "%x,%x",
318 318 rp->regspec_bustype, rp->regspec_addr);
319 319 return (DDI_SUCCESS);
320 320 }
321 321
322 322
323 323 /*
324 324 * Called from the bus_ctl op of some drivers.
325 325 * to implement the DDI_CTLOPS_INITCHILD operation.
326 326 *
327 327 * NEW drivers should NOT use this function, but should declare
328 328 * there own initchild/uninitchild handlers. (This function assumes
329 329 * the layout of the parent private data and the format of "reg",
330 330 * "ranges", "interrupts" properties and that #address-cells and
331 331 * #size-cells of the parent bus are defined to be default values.)
332 332 */
333 333 int
334 334 impl_ddi_sunbus_initchild(dev_info_t *child)
335 335 {
336 336 char name[MAXNAMELEN];
337 337
338 338 (void) impl_sunbus_name_child(child, name, MAXNAMELEN);
339 339 ddi_set_name_addr(child, name);
340 340
341 341 /*
342 342 * Try to merge .conf node. If successful, return failure to
343 343 * remove this child.
344 344 */
345 345 if ((ndi_dev_is_persistent_node(child) == 0) &&
346 346 (ndi_merge_node(child, impl_sunbus_name_child) == DDI_SUCCESS)) {
347 347 impl_ddi_sunbus_removechild(child);
348 348 return (DDI_FAILURE);
349 349 }
350 350 return (DDI_SUCCESS);
351 351 }
352 352
353 353 /*
354 354 * A better name for this function would be impl_ddi_sunbus_uninitchild()
355 355 * It does not remove the child, it uninitializes it, reclaiming the
356 356 * resources taken by impl_ddi_sunbus_initchild.
357 357 */
358 358 void
359 359 impl_ddi_sunbus_removechild(dev_info_t *dip)
360 360 {
361 361 impl_free_ddi_ppd(dip);
362 362 ddi_set_name_addr(dip, NULL);
363 363 /*
364 364 * Strip the node to properly convert it back to prototype form
365 365 */
366 366 impl_rem_dev_props(dip);
367 367 }
368 368
369 369 /*
370 370 * SECTION: DDI Interrupt
371 371 */
372 372
373 373 void
374 374 cells_1275_copy(prop_1275_cell_t *from, prop_1275_cell_t *to, int32_t len)
375 375 {
376 376 int i;
377 377 for (i = 0; i < len; i++)
378 378 *to = *from;
379 379 }
380 380
381 381 prop_1275_cell_t *
382 382 cells_1275_cmp(prop_1275_cell_t *cell1, prop_1275_cell_t *cell2, int32_t len)
383 383 {
384 384 prop_1275_cell_t *match_cell = 0;
385 385 int32_t i;
386 386
387 387 for (i = 0; i < len; i++)
388 388 if (cell1[i] != cell2[i]) {
389 389 match_cell = &cell1[i];
390 390 break;
391 391 }
392 392
393 393 return (match_cell);
394 394 }
395 395
396 396 /*
397 397 * get_intr_parent() is a generic routine that process a 1275 interrupt
398 398 * map (imap) property. This function returns a dev_info_t structure
399 399 * which claims ownership of the interrupt domain.
400 400 * It also returns the new interrupt translation within this new domain.
401 401 * If an interrupt-parent or interrupt-map property are not found,
402 402 * then we fallback to using the device tree's parent.
403 403 *
404 404 * imap entry format:
405 405 * <reg>,<interrupt>,<phandle>,<translated interrupt>
406 406 * reg - The register specification in the interrupts domain
407 407 * interrupt - The interrupt specification
408 408 * phandle - PROM handle of the device that owns the xlated interrupt domain
409 409 * translated interrupt - interrupt specifier in the parents domain
410 410 * note: <reg>,<interrupt> - The reg and interrupt can be combined to create
411 411 * a unique entry called a unit interrupt specifier.
412 412 *
413 413 * Here's the processing steps:
414 414 * step1 - If the interrupt-parent property exists, create the ispec and
415 415 * return the dip of the interrupt parent.
416 416 * step2 - Extract the interrupt-map property and the interrupt-map-mask
417 417 * If these don't exist, just return the device tree parent.
418 418 * step3 - build up the unit interrupt specifier to match against the
419 419 * interrupt map property
420 420 * step4 - Scan the interrupt-map property until a match is found
421 421 * step4a - Extract the interrupt parent
422 422 * step4b - Compare the unit interrupt specifier
423 423 */
424 424 dev_info_t *
425 425 get_intr_parent(dev_info_t *pdip, dev_info_t *dip, ddi_intr_handle_impl_t *hdlp)
426 426 {
427 427 prop_1275_cell_t *imap, *imap_mask, *scan, *reg_p, *match_req;
428 428 int32_t imap_sz, imap_cells, imap_scan_cells, imap_mask_sz,
429 429 addr_cells, intr_cells, reg_len, i, j;
430 430 int32_t match_found = 0;
431 431 dev_info_t *intr_parent_dip = NULL;
432 432 uint32_t *intr = &hdlp->ih_vector;
433 433 uint32_t nodeid;
434 434 #ifdef DEBUG
435 435 static int debug = 0;
436 436 #endif
437 437
438 438 /*
439 439 * step1
440 440 * If we have an interrupt-parent property, this property represents
441 441 * the nodeid of our interrupt parent.
442 442 */
443 443 if ((nodeid = ddi_getprop(DDI_DEV_T_ANY, dip, 0,
444 444 "interrupt-parent", -1)) != -1) {
445 445 intr_parent_dip = e_ddi_nodeid_to_dip(nodeid);
446 446 ASSERT(intr_parent_dip);
447 447
448 448 /*
449 449 * Attach the interrupt parent.
450 450 *
451 451 * N.B. e_ddi_nodeid_to_dip() isn't safe under DR.
452 452 * Also, interrupt parent isn't held. This needs
453 453 * to be revisited if DR-capable platforms implement
454 454 * interrupt redirection.
455 455 */
456 456 if (i_ddi_attach_node_hierarchy(intr_parent_dip)
457 457 != DDI_SUCCESS) {
458 458 ndi_rele_devi(intr_parent_dip);
459 459 return (NULL);
460 460 }
461 461
462 462 return (intr_parent_dip);
463 463 }
464 464
465 465 /*
466 466 * step2
467 467 * Get interrupt map structure from PROM property
468 468 */
469 469 if (ddi_getlongprop(DDI_DEV_T_ANY, pdip, DDI_PROP_DONTPASS,
470 470 "interrupt-map", (caddr_t)&imap, &imap_sz)
471 471 != DDI_PROP_SUCCESS) {
472 472 /*
473 473 * If we don't have an imap property, default to using the
474 474 * device tree.
475 475 */
476 476
477 477 ndi_hold_devi(pdip);
478 478 return (pdip);
479 479 }
480 480
481 481 /* Get the interrupt mask property */
482 482 if (ddi_getlongprop(DDI_DEV_T_ANY, pdip, DDI_PROP_DONTPASS,
483 483 "interrupt-map-mask", (caddr_t)&imap_mask, &imap_mask_sz)
484 484 != DDI_PROP_SUCCESS) {
485 485 /*
486 486 * If we don't find this property, we have to fail the request
487 487 * because the 1275 imap property wasn't defined correctly.
488 488 */
489 489 ASSERT(intr_parent_dip == NULL);
490 490 goto exit2;
491 491 }
492 492
493 493 /* Get the address cell size */
494 494 addr_cells = ddi_getprop(DDI_DEV_T_ANY, pdip, 0,
495 495 "#address-cells", 2);
496 496
497 497 /* Get the interrupts cell size */
498 498 intr_cells = ddi_getprop(DDI_DEV_T_ANY, pdip, 0,
499 499 "#interrupt-cells", 1);
500 500
501 501 /*
502 502 * step3
503 503 * Now lets build up the unit interrupt specifier e.g. reg,intr
504 504 * and apply the imap mask. match_req will hold this when we're
505 505 * through.
506 506 */
507 507 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, "reg",
508 508 (caddr_t)®_p, ®_len) != DDI_SUCCESS) {
509 509 ASSERT(intr_parent_dip == NULL);
510 510 goto exit3;
511 511 }
512 512
513 513 match_req = kmem_alloc(CELLS_1275_TO_BYTES(addr_cells) +
514 514 CELLS_1275_TO_BYTES(intr_cells), KM_SLEEP);
515 515
516 516 for (i = 0; i < addr_cells; i++)
517 517 match_req[i] = (reg_p[i] & imap_mask[i]);
518 518
519 519 for (j = 0; j < intr_cells; i++, j++)
520 520 match_req[i] = (intr[j] & imap_mask[i]);
521 521
522 522 /* Calculate the imap size in cells */
523 523 imap_cells = BYTES_TO_1275_CELLS(imap_sz);
524 524
525 525 #ifdef DEBUG
526 526 if (debug)
527 527 prom_printf("reg cell size 0x%x, intr cell size 0x%x, "
528 528 "match_request 0x%p, imap 0x%p\n", addr_cells, intr_cells,
529 529 (void *)match_req, (void *)imap);
530 530 #endif
531 531
532 532 /*
533 533 * Scan the imap property looking for a match of the interrupt unit
534 534 * specifier. This loop is rather complex since the data within the
535 535 * imap property may vary in size.
536 536 */
537 537 for (scan = imap, imap_scan_cells = i = 0;
538 538 imap_scan_cells < imap_cells; scan += i, imap_scan_cells += i) {
539 539 int new_intr_cells;
540 540
541 541 /* Set the index to the nodeid field */
542 542 i = addr_cells + intr_cells;
543 543
544 544 /*
545 545 * step4a
546 546 * Translate the nodeid field to a dip
547 547 */
548 548 ASSERT(intr_parent_dip == NULL);
549 549 intr_parent_dip = e_ddi_nodeid_to_dip((uint_t)scan[i++]);
550 550
551 551 ASSERT(intr_parent_dip != 0);
552 552 #ifdef DEBUG
553 553 if (debug)
554 554 prom_printf("scan 0x%p\n", (void *)scan);
555 555 #endif
556 556 /*
557 557 * The tmp_dip describes the new domain, get it's interrupt
558 558 * cell size
559 559 */
560 560 new_intr_cells = ddi_getprop(DDI_DEV_T_ANY, intr_parent_dip, 0,
561 561 "#interrupts-cells", 1);
562 562
563 563 /*
564 564 * step4b
565 565 * See if we have a match on the interrupt unit specifier
566 566 */
567 567 if (cells_1275_cmp(match_req, scan, addr_cells + intr_cells)
568 568 == 0) {
569 569 uint32_t *intr;
570 570
571 571 match_found = 1;
572 572
573 573 /*
574 574 * If we have an imap parent whose not in our device
575 575 * tree path, we need to hold and install that driver.
576 576 */
577 577 if (i_ddi_attach_node_hierarchy(intr_parent_dip)
578 578 != DDI_SUCCESS) {
579 579 ndi_rele_devi(intr_parent_dip);
580 580 intr_parent_dip = (dev_info_t *)NULL;
581 581 goto exit4;
582 582 }
583 583
584 584 /*
585 585 * We need to handcraft an ispec along with a bus
586 586 * interrupt value, so we can dup it into our
587 587 * standard ispec structure.
588 588 */
589 589 /* Extract the translated interrupt information */
590 590 intr = kmem_alloc(
591 591 CELLS_1275_TO_BYTES(new_intr_cells), KM_SLEEP);
592 592
593 593 for (j = 0; j < new_intr_cells; j++, i++)
594 594 intr[j] = scan[i];
595 595
596 596 cells_1275_copy(intr, &hdlp->ih_vector, new_intr_cells);
597 597
598 598 kmem_free(intr, CELLS_1275_TO_BYTES(new_intr_cells));
599 599
600 600 #ifdef DEBUG
601 601 if (debug)
602 602 prom_printf("dip 0x%p\n",
603 603 (void *)intr_parent_dip);
604 604 #endif
605 605 break;
606 606 } else {
607 607 #ifdef DEBUG
608 608 if (debug)
609 609 prom_printf("dip 0x%p\n",
610 610 (void *)intr_parent_dip);
611 611 #endif
612 612 ndi_rele_devi(intr_parent_dip);
613 613 intr_parent_dip = NULL;
614 614 i += new_intr_cells;
615 615 }
616 616 }
617 617
618 618 /*
619 619 * If we haven't found our interrupt parent at this point, fallback
620 620 * to using the device tree.
621 621 */
622 622 if (!match_found) {
623 623 ndi_hold_devi(pdip);
624 624 ASSERT(intr_parent_dip == NULL);
625 625 intr_parent_dip = pdip;
626 626 }
627 627
628 628 ASSERT(intr_parent_dip != NULL);
629 629
630 630 exit4:
631 631 kmem_free(reg_p, reg_len);
632 632 kmem_free(match_req, CELLS_1275_TO_BYTES(addr_cells) +
633 633 CELLS_1275_TO_BYTES(intr_cells));
634 634
635 635 exit3:
636 636 kmem_free(imap_mask, imap_mask_sz);
637 637
638 638 exit2:
639 639 kmem_free(imap, imap_sz);
640 640
641 641 return (intr_parent_dip);
642 642 }
643 643
644 644 /*
645 645 * process_intr_ops:
646 646 *
647 647 * Process the interrupt op via the interrupt parent.
648 648 */
649 649 int
650 650 process_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t op,
651 651 ddi_intr_handle_impl_t *hdlp, void *result)
652 652 {
653 653 int ret = DDI_FAILURE;
654 654
655 655 if (NEXUS_HAS_INTR_OP(pdip)) {
656 656 ret = (*(DEVI(pdip)->devi_ops->devo_bus_ops->
657 657 bus_intr_op)) (pdip, rdip, op, hdlp, result);
658 658 } else {
659 659 cmn_err(CE_WARN, "Failed to process interrupt "
660 660 "for %s%d due to down-rev nexus driver %s%d",
661 661 ddi_get_name(rdip), ddi_get_instance(rdip),
662 662 ddi_get_name(pdip), ddi_get_instance(pdip));
663 663 }
664 664
665 665 return (ret);
666 666 }
667 667
668 668 /*ARGSUSED*/
669 669 uint_t
670 670 softlevel1(caddr_t arg)
671 671 {
672 672 softint();
673 673 return (1);
674 674 }
675 675
676 676 /*
677 677 * indirection table, to save us some large switch statements
678 678 * NOTE: This must agree with "INTLEVEL_foo" constants in
679 679 * <sys/avintr.h>
680 680 */
681 681 struct autovec *const vectorlist[] = { 0 };
682 682
683 683 /*
684 684 * This value is exported here for the functions in avintr.c
685 685 */
686 686 const uint_t maxautovec = (sizeof (vectorlist) / sizeof (vectorlist[0]));
687 687
688 688 /*
689 689 * Check for machine specific interrupt levels which cannot be reassigned by
690 690 * settrap(), sun4u version.
691 691 *
692 692 * sun4u does not support V8 SPARC "fast trap" handlers.
693 693 */
694 694 /*ARGSUSED*/
695 695 int
696 696 exclude_settrap(int lvl)
697 697 {
698 698 return (1);
699 699 }
700 700
701 701 /*
702 702 * Check for machine specific interrupt levels which cannot have interrupt
703 703 * handlers added. We allow levels 1 through 15; level 0 is nonsense.
704 704 */
705 705 /*ARGSUSED*/
706 706 int
707 707 exclude_level(int lvl)
708 708 {
709 709 return ((lvl < 1) || (lvl > 15));
710 710 }
711 711
712 712 /*
713 713 * Wrapper functions used by New DDI interrupt framework.
714 714 */
715 715
716 716 /*
717 717 * i_ddi_intr_ops:
718 718 */
719 719 int
720 720 i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op,
721 721 ddi_intr_handle_impl_t *hdlp, void *result)
722 722 {
723 723 dev_info_t *pdip = ddi_get_parent(dip);
724 724 int ret = DDI_FAILURE;
725 725
726 726 /*
727 727 * The following check is required to address
728 728 * one of the test case of ADDI test suite.
729 729 */
730 730 if (pdip == NULL)
731 731 return (DDI_FAILURE);
732 732
733 733 if (hdlp->ih_type != DDI_INTR_TYPE_FIXED)
734 734 return (process_intr_ops(pdip, rdip, op, hdlp, result));
735 735
736 736 if (hdlp->ih_vector == 0)
737 737 hdlp->ih_vector = i_ddi_get_inum(rdip, hdlp->ih_inum);
738 738
739 739 if (hdlp->ih_pri == 0)
740 740 hdlp->ih_pri = i_ddi_get_intr_pri(rdip, hdlp->ih_inum);
741 741
742 742 switch (op) {
743 743 case DDI_INTROP_ADDISR:
744 744 case DDI_INTROP_REMISR:
745 745 case DDI_INTROP_GETTARGET:
746 746 case DDI_INTROP_SETTARGET:
747 747 case DDI_INTROP_ENABLE:
748 748 case DDI_INTROP_DISABLE:
749 749 case DDI_INTROP_BLOCKENABLE:
750 750 case DDI_INTROP_BLOCKDISABLE:
751 751 /*
752 752 * Try and determine our parent and possibly an interrupt
753 753 * translation. intr parent dip returned held
754 754 */
755 755 if ((pdip = get_intr_parent(pdip, dip, hdlp)) == NULL)
756 756 goto done;
757 757 }
758 758
759 759 ret = process_intr_ops(pdip, rdip, op, hdlp, result);
760 760
761 761 done:
762 762 switch (op) {
763 763 case DDI_INTROP_ADDISR:
764 764 case DDI_INTROP_REMISR:
765 765 case DDI_INTROP_ENABLE:
766 766 case DDI_INTROP_DISABLE:
767 767 case DDI_INTROP_BLOCKENABLE:
768 768 case DDI_INTROP_BLOCKDISABLE:
769 769 /* Release hold acquired in get_intr_parent() */
770 770 if (pdip)
771 771 ndi_rele_devi(pdip);
772 772 }
773 773
774 774 hdlp->ih_vector = 0;
775 775
776 776 return (ret);
777 777 }
778 778
779 779 /*
780 780 * i_ddi_add_ivintr:
781 781 */
782 782 /*ARGSUSED*/
783 783 int
784 784 i_ddi_add_ivintr(ddi_intr_handle_impl_t *hdlp)
785 785 {
786 786 /*
787 787 * If the PIL was set and is valid use it, otherwise
788 788 * default it to 1
789 789 */
790 790 if ((hdlp->ih_pri < 1) || (hdlp->ih_pri > PIL_MAX))
791 791 hdlp->ih_pri = 1;
792 792
793 793 VERIFY(add_ivintr(hdlp->ih_vector, hdlp->ih_pri,
794 794 (intrfunc)hdlp->ih_cb_func, hdlp->ih_cb_arg1,
795 795 hdlp->ih_cb_arg2, NULL) == 0);
796 796
797 797 return (DDI_SUCCESS);
798 798 }
799 799
800 800 /*
801 801 * i_ddi_rem_ivintr:
802 802 */
803 803 /*ARGSUSED*/
804 804 void
805 805 i_ddi_rem_ivintr(ddi_intr_handle_impl_t *hdlp)
806 806 {
807 807 VERIFY(rem_ivintr(hdlp->ih_vector, hdlp->ih_pri) == 0);
808 808 }
809 809
810 810 /*
811 811 * i_ddi_get_inum - Get the interrupt number property from the
812 812 * specified device. Note that this function is called only for
813 813 * the FIXED interrupt type.
814 814 */
815 815 uint32_t
816 816 i_ddi_get_inum(dev_info_t *dip, uint_t inumber)
817 817 {
818 818 int32_t intrlen, intr_cells, max_intrs;
819 819 prop_1275_cell_t *ip, intr_sz;
820 820 uint32_t intr = 0;
821 821
822 822 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS |
823 823 DDI_PROP_CANSLEEP,
824 824 "interrupts", (caddr_t)&ip, &intrlen) == DDI_SUCCESS) {
825 825
826 826 intr_cells = ddi_getprop(DDI_DEV_T_ANY, dip, 0,
827 827 "#interrupt-cells", 1);
828 828
829 829 /* adjust for number of bytes */
830 830 intr_sz = CELLS_1275_TO_BYTES(intr_cells);
831 831
832 832 /* Calculate the number of interrupts */
833 833 max_intrs = intrlen / intr_sz;
834 834
835 835 if (inumber < max_intrs) {
836 836 prop_1275_cell_t *intrp = ip;
837 837
838 838 /* Index into interrupt property */
839 839 intrp += (inumber * intr_cells);
840 840
841 841 cells_1275_copy(intrp, &intr, intr_cells);
842 842 }
843 843
844 844 kmem_free(ip, intrlen);
845 845 }
846 846
847 847 return (intr);
848 848 }
849 849
850 850 /*
851 851 * i_ddi_get_intr_pri - Get the interrupt-priorities property from
852 852 * the specified device. Note that this function is called only for
853 853 * the FIXED interrupt type.
854 854 */
855 855 uint32_t
856 856 i_ddi_get_intr_pri(dev_info_t *dip, uint_t inumber)
857 857 {
858 858 uint32_t *intr_prio_p;
859 859 uint32_t pri = 0;
860 860 int32_t i;
861 861
862 862 /*
863 863 * Use the "interrupt-priorities" property to determine the
864 864 * the pil/ipl for the interrupt handler.
865 865 */
866 866 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
867 867 "interrupt-priorities", (caddr_t)&intr_prio_p,
868 868 &i) == DDI_SUCCESS) {
869 869 if (inumber < (i / sizeof (int32_t)))
870 870 pri = intr_prio_p[inumber];
871 871 kmem_free(intr_prio_p, i);
872 872 }
873 873
874 874 return (pri);
875 875 }
876 876
877 877 int
878 878 i_ddi_get_intx_nintrs(dev_info_t *dip)
879 879 {
880 880 int32_t intrlen;
881 881 prop_1275_cell_t intr_sz;
882 882 prop_1275_cell_t *ip;
883 883 int32_t ret = 0;
884 884
885 885 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS |
886 886 DDI_PROP_CANSLEEP,
887 887 "interrupts", (caddr_t)&ip, &intrlen) == DDI_SUCCESS) {
888 888
889 889 intr_sz = ddi_getprop(DDI_DEV_T_ANY, dip, 0,
890 890 "#interrupt-cells", 1);
891 891 /* adjust for number of bytes */
892 892 intr_sz = CELLS_1275_TO_BYTES(intr_sz);
893 893
894 894 ret = intrlen / intr_sz;
895 895
896 896 kmem_free(ip, intrlen);
897 897 }
898 898
899 899 return (ret);
900 900 }
901 901
902 902 /*
903 903 * i_ddi_add_softint - allocate and add a software interrupt.
904 904 *
905 905 * NOTE: All software interrupts that are registered through DDI
906 906 * should be triggered only on a single target or CPU.
907 907 */
908 908 int
909 909 i_ddi_add_softint(ddi_softint_hdl_impl_t *hdlp)
910 910 {
911 911 if ((hdlp->ih_private = (void *)add_softintr(hdlp->ih_pri,
912 912 hdlp->ih_cb_func, hdlp->ih_cb_arg1, SOFTINT_ST)) == NULL)
913 913 return (DDI_FAILURE);
914 914
915 915 return (DDI_SUCCESS);
916 916 }
917 917
918 918 /*
919 919 * i_ddi_remove_softint - remove and free a software interrupt.
920 920 */
921 921 void
922 922 i_ddi_remove_softint(ddi_softint_hdl_impl_t *hdlp)
923 923 {
924 924 ASSERT(hdlp->ih_private != NULL);
925 925
926 926 if (rem_softintr((uint64_t)hdlp->ih_private) == 0)
927 927 hdlp->ih_private = NULL;
928 928 }
929 929
930 930 /*
931 931 * i_ddi_trigger_softint - trigger a software interrupt.
932 932 */
933 933 int
934 934 i_ddi_trigger_softint(ddi_softint_hdl_impl_t *hdlp, void *arg2)
935 935 {
936 936 int ret;
937 937
938 938 ASSERT(hdlp->ih_private != NULL);
939 939
940 940 /* Update the second argument for the software interrupt */
941 941 if ((ret = update_softint_arg2((uint64_t)hdlp->ih_private, arg2)) == 0)
942 942 setsoftint((uint64_t)hdlp->ih_private);
943 943
944 944 return (ret ? DDI_EPENDING : DDI_SUCCESS);
945 945 }
946 946
947 947 /*
948 948 * i_ddi_set_softint_pri - change software interrupt priority.
949 949 */
950 950 /* ARGSUSED */
951 951 int
952 952 i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *hdlp, uint_t old_pri)
953 953 {
954 954 int ret;
955 955
956 956 ASSERT(hdlp->ih_private != NULL);
957 957
958 958 /* Update the interrupt priority for the software interrupt */
959 959 ret = update_softint_pri((uint64_t)hdlp->ih_private, hdlp->ih_pri);
960 960
961 961 return (ret ? DDI_FAILURE : DDI_SUCCESS);
962 962 }
963 963
964 964 /*ARGSUSED*/
965 965 void
966 966 i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *hdlp)
967 967 {
968 968 }
969 969
970 970 /*ARGSUSED*/
971 971 void
972 972 i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *hdlp)
973 973 {
974 974 }
975 975
976 976 /*
977 977 * SECTION: DDI Memory/DMA
978 978 */
979 979
980 980 /* set HAT endianess attributes from ddi_device_acc_attr */
981 981 void
982 982 i_ddi_devacc_to_hatacc(ddi_device_acc_attr_t *devaccp, uint_t *hataccp)
983 983 {
984 984 if (devaccp != NULL) {
985 985 if (devaccp->devacc_attr_endian_flags == DDI_STRUCTURE_LE_ACC) {
986 986 *hataccp &= ~HAT_ENDIAN_MASK;
987 987 *hataccp |= HAT_STRUCTURE_LE;
988 988 }
989 989 }
990 990 }
991 991
992 992 /*
993 993 * Check if the specified cache attribute is supported on the platform.
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994 994 * This function must be called before i_ddi_cacheattr_to_hatacc().
995 995 */
996 996 boolean_t
997 997 i_ddi_check_cache_attr(uint_t flags)
998 998 {
999 999 /*
1000 1000 * The cache attributes are mutually exclusive. Any combination of
1001 1001 * the attributes leads to a failure.
1002 1002 */
1003 1003 uint_t cache_attr = IOMEM_CACHE_ATTR(flags);
1004 - if ((cache_attr != 0) && ((cache_attr & (cache_attr - 1)) != 0))
1004 + if ((cache_attr != 0) && !ISP2(cache_attr))
1005 1005 return (B_FALSE);
1006 1006
1007 1007 /*
1008 1008 * On the sparc architecture, only IOMEM_DATA_CACHED is meaningful,
1009 1009 * but others lead to a failure.
1010 1010 */
1011 1011 if (cache_attr & IOMEM_DATA_CACHED)
1012 1012 return (B_TRUE);
1013 1013 else
1014 1014 return (B_FALSE);
1015 1015 }
1016 1016
1017 1017 /* set HAT cache attributes from the cache attributes */
1018 1018 void
1019 1019 i_ddi_cacheattr_to_hatacc(uint_t flags, uint_t *hataccp)
1020 1020 {
1021 1021 uint_t cache_attr = IOMEM_CACHE_ATTR(flags);
1022 1022 static char *fname = "i_ddi_cacheattr_to_hatacc";
1023 1023 #if defined(lint)
1024 1024 *hataccp = *hataccp;
1025 1025 #endif
1026 1026 /*
1027 1027 * set HAT attrs according to the cache attrs.
1028 1028 */
1029 1029 switch (cache_attr) {
1030 1030 /*
1031 1031 * The cache coherency is always maintained on SPARC, and
1032 1032 * nothing is required.
1033 1033 */
1034 1034 case IOMEM_DATA_CACHED:
1035 1035 break;
1036 1036 /*
1037 1037 * Both IOMEM_DATA_UC_WRITE_COMBINED and IOMEM_DATA_UNCACHED are
1038 1038 * not supported on SPARC -- this case must not occur because the
1039 1039 * cache attribute is scrutinized before this function is called.
1040 1040 */
1041 1041 case IOMEM_DATA_UNCACHED:
1042 1042 case IOMEM_DATA_UC_WR_COMBINE:
1043 1043 default:
1044 1044 cmn_err(CE_WARN, "%s: cache_attr=0x%x is ignored.",
1045 1045 fname, cache_attr);
1046 1046 }
1047 1047 }
1048 1048
1049 1049 static vmem_t *little_endian_arena;
1050 1050 static vmem_t *big_endian_arena;
1051 1051
1052 1052 static void *
1053 1053 segkmem_alloc_le(vmem_t *vmp, size_t size, int flag)
1054 1054 {
1055 1055 return (segkmem_xalloc(vmp, NULL, size, flag, HAT_STRUCTURE_LE,
1056 1056 segkmem_page_create, NULL));
1057 1057 }
1058 1058
1059 1059 static void *
1060 1060 segkmem_alloc_be(vmem_t *vmp, size_t size, int flag)
1061 1061 {
1062 1062 return (segkmem_xalloc(vmp, NULL, size, flag, HAT_STRUCTURE_BE,
1063 1063 segkmem_page_create, NULL));
1064 1064 }
1065 1065
1066 1066 void
1067 1067 ka_init(void)
1068 1068 {
1069 1069 little_endian_arena = vmem_create("little_endian", NULL, 0, 1,
1070 1070 segkmem_alloc_le, segkmem_free, heap_arena, 0, VM_SLEEP);
1071 1071 big_endian_arena = vmem_create("big_endian", NULL, 0, 1,
1072 1072 segkmem_alloc_be, segkmem_free, heap_arena, 0, VM_SLEEP);
1073 1073 }
1074 1074
1075 1075 /*
1076 1076 * Allocate from the system, aligned on a specific boundary.
1077 1077 * The alignment, if non-zero, must be a power of 2.
1078 1078 */
1079 1079 static void *
1080 1080 kalloca(size_t size, size_t align, int cansleep, uint_t endian_flags)
1081 1081 {
1082 1082 size_t *addr, *raddr, rsize;
1083 1083 size_t hdrsize = 4 * sizeof (size_t); /* must be power of 2 */
1084 1084
1085 1085 align = MAX(align, hdrsize);
1086 1086 ASSERT((align & (align - 1)) == 0);
1087 1087
1088 1088 /*
1089 1089 * We need to allocate
1090 1090 * rsize = size + hdrsize + align - MIN(hdrsize, buffer_alignment)
1091 1091 * bytes to be sure we have enough freedom to satisfy the request.
1092 1092 * Since the buffer alignment depends on the request size, this is
1093 1093 * not straightforward to use directly.
1094 1094 *
1095 1095 * kmem guarantees that any allocation of a 64-byte multiple will be
1096 1096 * 64-byte aligned. Since rounding up the request could add more
1097 1097 * than we save, we compute the size with and without alignment, and
1098 1098 * use the smaller of the two.
1099 1099 */
1100 1100 rsize = size + hdrsize + align;
1101 1101
1102 1102 if (endian_flags == DDI_STRUCTURE_LE_ACC) {
1103 1103 raddr = vmem_alloc(little_endian_arena, rsize,
1104 1104 cansleep ? VM_SLEEP : VM_NOSLEEP);
1105 1105 } else {
1106 1106 raddr = vmem_alloc(big_endian_arena, rsize,
1107 1107 cansleep ? VM_SLEEP : VM_NOSLEEP);
1108 1108 }
1109 1109
1110 1110 if (raddr == NULL)
1111 1111 return (NULL);
1112 1112
1113 1113 addr = (size_t *)P2ROUNDUP((uintptr_t)raddr + hdrsize, align);
1114 1114 ASSERT((uintptr_t)addr + size - (uintptr_t)raddr <= rsize);
1115 1115
1116 1116 addr[-3] = (size_t)endian_flags;
1117 1117 addr[-2] = (size_t)raddr;
1118 1118 addr[-1] = rsize;
1119 1119
1120 1120 return (addr);
1121 1121 }
1122 1122
1123 1123 static void
1124 1124 kfreea(void *addr)
1125 1125 {
1126 1126 size_t *saddr = addr;
1127 1127
1128 1128 if (saddr[-3] == DDI_STRUCTURE_LE_ACC)
1129 1129 vmem_free(little_endian_arena, (void *)saddr[-2], saddr[-1]);
1130 1130 else
1131 1131 vmem_free(big_endian_arena, (void *)saddr[-2], saddr[-1]);
1132 1132 }
1133 1133
1134 1134 /*
1135 1135 * This used to be ddi_iomin, but we were the only remaining caller, so
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1136 1136 * we've made it private and moved it here.
1137 1137 */
1138 1138 static int
1139 1139 i_ddi_iomin(dev_info_t *a, int i, int stream)
1140 1140 {
1141 1141 int r;
1142 1142
1143 1143 /*
1144 1144 * Make sure that the initial value is sane
1145 1145 */
1146 - if (i & (i - 1))
1146 + if (!ISP2(i))
1147 1147 return (0);
1148 1148 if (i == 0)
1149 1149 i = (stream) ? 4 : 1;
1150 1150
1151 1151 r = ddi_ctlops(a, a,
1152 1152 DDI_CTLOPS_IOMIN, (void *)(uintptr_t)stream, (void *)&i);
1153 - if (r != DDI_SUCCESS || (i & (i - 1)))
1153 + if (r != DDI_SUCCESS || !ISP2(i))
1154 1154 return (0);
1155 1155 return (i);
1156 1156 }
1157 1157
1158 1158 int
1159 1159 i_ddi_mem_alloc(dev_info_t *dip, ddi_dma_attr_t *attr,
1160 1160 size_t length, int cansleep, int flags,
1161 1161 ddi_device_acc_attr_t *accattrp,
1162 1162 caddr_t *kaddrp, size_t *real_length, ddi_acc_hdl_t *handlep)
1163 1163 {
1164 1164 caddr_t a;
1165 1165 int iomin, align, streaming;
1166 1166 uint_t endian_flags = DDI_NEVERSWAP_ACC;
1167 1167
1168 1168 #if defined(lint)
1169 1169 *handlep = *handlep;
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1170 1170 #endif
1171 1171
1172 1172 /*
1173 1173 * Check legality of arguments
1174 1174 */
1175 1175 if (length == 0 || kaddrp == NULL || attr == NULL) {
1176 1176 return (DDI_FAILURE);
1177 1177 }
1178 1178
1179 1179 if (attr->dma_attr_minxfer == 0 || attr->dma_attr_align == 0 ||
1180 - (attr->dma_attr_align & (attr->dma_attr_align - 1)) ||
1181 - (attr->dma_attr_minxfer & (attr->dma_attr_minxfer - 1))) {
1180 + !ISP2(attr->dma_attr_align) || !ISP2(attr->dma_attr_minxfer)) {
1182 1181 return (DDI_FAILURE);
1183 1182 }
1184 1183
1185 1184 /*
1186 1185 * check if a streaming sequential xfer is requested.
1187 1186 */
1188 1187 streaming = (flags & DDI_DMA_STREAMING) ? 1 : 0;
1189 1188
1190 1189 /*
1191 1190 * Drivers for 64-bit capable SBus devices will encode
1192 1191 * the burtsizes for 64-bit xfers in the upper 16-bits.
1193 1192 * For DMA alignment, we use the most restrictive
1194 1193 * alignment of 32-bit and 64-bit xfers.
1195 1194 */
1196 1195 iomin = (attr->dma_attr_burstsizes & 0xffff) |
1197 1196 ((attr->dma_attr_burstsizes >> 16) & 0xffff);
1198 1197 /*
1199 1198 * If a driver set burtsizes to 0, we give him byte alignment.
1200 1199 * Otherwise align at the burtsizes boundary.
1201 1200 */
1202 1201 if (iomin == 0)
1203 1202 iomin = 1;
1204 1203 else
1205 1204 iomin = 1 << (ddi_fls(iomin) - 1);
1206 1205 iomin = maxbit(iomin, attr->dma_attr_minxfer);
1207 1206 iomin = maxbit(iomin, attr->dma_attr_align);
1208 1207 iomin = i_ddi_iomin(dip, iomin, streaming);
1209 1208 if (iomin == 0)
1210 1209 return (DDI_FAILURE);
1211 1210
1212 1211 ASSERT((iomin & (iomin - 1)) == 0);
1213 1212 ASSERT(iomin >= attr->dma_attr_minxfer);
1214 1213 ASSERT(iomin >= attr->dma_attr_align);
1215 1214
1216 1215 length = P2ROUNDUP(length, iomin);
1217 1216 align = iomin;
1218 1217
1219 1218 if (accattrp != NULL)
1220 1219 endian_flags = accattrp->devacc_attr_endian_flags;
1221 1220
1222 1221 a = kalloca(length, align, cansleep, endian_flags);
1223 1222 if ((*kaddrp = a) == 0) {
1224 1223 return (DDI_FAILURE);
1225 1224 } else {
1226 1225 if (real_length) {
1227 1226 *real_length = length;
1228 1227 }
1229 1228 if (handlep) {
1230 1229 /*
1231 1230 * assign handle information
1232 1231 */
1233 1232 impl_acc_hdl_init(handlep);
1234 1233 }
1235 1234 return (DDI_SUCCESS);
1236 1235 }
1237 1236 }
1238 1237
1239 1238 /* ARGSUSED */
1240 1239 void
1241 1240 i_ddi_mem_free(caddr_t kaddr, ddi_acc_hdl_t *ap)
1242 1241 {
1243 1242 kfreea(kaddr);
1244 1243 }
1245 1244
1246 1245 /*
1247 1246 * SECTION: DDI Data Access
1248 1247 */
1249 1248
1250 1249 static uintptr_t impl_acc_hdl_id = 0;
1251 1250
1252 1251 /*
1253 1252 * access handle allocator
1254 1253 */
1255 1254 ddi_acc_hdl_t *
1256 1255 impl_acc_hdl_get(ddi_acc_handle_t hdl)
1257 1256 {
1258 1257 /*
1259 1258 * Extract the access handle address from the DDI implemented
1260 1259 * access handle
1261 1260 */
1262 1261 return (&((ddi_acc_impl_t *)hdl)->ahi_common);
1263 1262 }
1264 1263
1265 1264 ddi_acc_handle_t
1266 1265 impl_acc_hdl_alloc(int (*waitfp)(caddr_t), caddr_t arg)
1267 1266 {
1268 1267 ddi_acc_impl_t *hp;
1269 1268 on_trap_data_t *otp;
1270 1269 int sleepflag;
1271 1270
1272 1271 sleepflag = ((waitfp == (int (*)())KM_SLEEP) ? KM_SLEEP : KM_NOSLEEP);
1273 1272
1274 1273 /*
1275 1274 * Allocate and initialize the data access handle and error status.
1276 1275 */
1277 1276 if ((hp = kmem_zalloc(sizeof (ddi_acc_impl_t), sleepflag)) == NULL)
1278 1277 goto fail;
1279 1278 if ((hp->ahi_err = (ndi_err_t *)kmem_zalloc(
1280 1279 sizeof (ndi_err_t), sleepflag)) == NULL) {
1281 1280 kmem_free(hp, sizeof (ddi_acc_impl_t));
1282 1281 goto fail;
1283 1282 }
1284 1283 if ((otp = (on_trap_data_t *)kmem_zalloc(
1285 1284 sizeof (on_trap_data_t), sleepflag)) == NULL) {
1286 1285 kmem_free(hp->ahi_err, sizeof (ndi_err_t));
1287 1286 kmem_free(hp, sizeof (ddi_acc_impl_t));
1288 1287 goto fail;
1289 1288 }
1290 1289 hp->ahi_err->err_ontrap = otp;
1291 1290 hp->ahi_common.ah_platform_private = (void *)hp;
1292 1291
1293 1292 return ((ddi_acc_handle_t)hp);
1294 1293 fail:
1295 1294 if ((waitfp != (int (*)())KM_SLEEP) &&
1296 1295 (waitfp != (int (*)())KM_NOSLEEP))
1297 1296 ddi_set_callback(waitfp, arg, &impl_acc_hdl_id);
1298 1297 return (NULL);
1299 1298 }
1300 1299
1301 1300 void
1302 1301 impl_acc_hdl_free(ddi_acc_handle_t handle)
1303 1302 {
1304 1303 ddi_acc_impl_t *hp;
1305 1304
1306 1305 /*
1307 1306 * The supplied (ddi_acc_handle_t) is actually a (ddi_acc_impl_t *),
1308 1307 * because that's what we allocated in impl_acc_hdl_alloc() above.
1309 1308 */
1310 1309 hp = (ddi_acc_impl_t *)handle;
1311 1310 if (hp) {
1312 1311 kmem_free(hp->ahi_err->err_ontrap, sizeof (on_trap_data_t));
1313 1312 kmem_free(hp->ahi_err, sizeof (ndi_err_t));
1314 1313 kmem_free(hp, sizeof (ddi_acc_impl_t));
1315 1314 if (impl_acc_hdl_id)
1316 1315 ddi_run_callback(&impl_acc_hdl_id);
1317 1316 }
1318 1317 }
1319 1318
1320 1319 #define PCI_GET_MP_PFN(mp, page_no) ((mp)->dmai_ndvmapages == 1 ? \
1321 1320 (pfn_t)(mp)->dmai_iopte:(((pfn_t *)(mp)->dmai_iopte)[page_no]))
1322 1321
1323 1322 /*
1324 1323 * Function called after a dma fault occurred to find out whether the
1325 1324 * fault address is associated with a driver that is able to handle faults
1326 1325 * and recover from faults.
1327 1326 */
1328 1327 /* ARGSUSED */
1329 1328 int
1330 1329 impl_dma_check(dev_info_t *dip, const void *handle, const void *addr,
1331 1330 const void *not_used)
1332 1331 {
1333 1332 ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle;
1334 1333 pfn_t fault_pfn = mmu_btop(*(uint64_t *)addr);
1335 1334 pfn_t comp_pfn;
1336 1335
1337 1336 /*
1338 1337 * The driver has to set DDI_DMA_FLAGERR to recover from dma faults.
1339 1338 */
1340 1339 int page;
1341 1340
1342 1341 ASSERT(mp);
1343 1342 for (page = 0; page < mp->dmai_ndvmapages; page++) {
1344 1343 comp_pfn = PCI_GET_MP_PFN(mp, page);
1345 1344 if (fault_pfn == comp_pfn)
1346 1345 return (DDI_FM_NONFATAL);
1347 1346 }
1348 1347 return (DDI_FM_UNKNOWN);
1349 1348 }
1350 1349
1351 1350 /*
1352 1351 * Function used to check if a given access handle owns the failing address.
1353 1352 * Called by ndi_fmc_error, when we detect a PIO error.
1354 1353 */
1355 1354 /* ARGSUSED */
1356 1355 static int
1357 1356 impl_acc_check(dev_info_t *dip, const void *handle, const void *addr,
1358 1357 const void *not_used)
1359 1358 {
1360 1359 pfn_t pfn, fault_pfn;
1361 1360 ddi_acc_hdl_t *hp;
1362 1361
1363 1362 hp = impl_acc_hdl_get((ddi_acc_handle_t)handle);
1364 1363
1365 1364 ASSERT(hp);
1366 1365
1367 1366 if (addr != NULL) {
1368 1367 pfn = hp->ah_pfn;
1369 1368 fault_pfn = mmu_btop(*(uint64_t *)addr);
1370 1369 if (fault_pfn >= pfn && fault_pfn < (pfn + hp->ah_pnum))
1371 1370 return (DDI_FM_NONFATAL);
1372 1371 }
1373 1372 return (DDI_FM_UNKNOWN);
1374 1373 }
1375 1374
1376 1375 void
1377 1376 impl_acc_err_init(ddi_acc_hdl_t *handlep)
1378 1377 {
1379 1378 int fmcap;
1380 1379 ndi_err_t *errp;
1381 1380 on_trap_data_t *otp;
1382 1381 ddi_acc_impl_t *hp = (ddi_acc_impl_t *)handlep;
1383 1382
1384 1383 fmcap = ddi_fm_capable(handlep->ah_dip);
1385 1384
1386 1385 if (handlep->ah_acc.devacc_attr_version < DDI_DEVICE_ATTR_V1 ||
1387 1386 !DDI_FM_ACC_ERR_CAP(fmcap)) {
1388 1387 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC;
1389 1388 } else if (DDI_FM_ACC_ERR_CAP(fmcap)) {
1390 1389 if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) {
1391 1390 if (handlep->ah_xfermodes)
1392 1391 return;
1393 1392 i_ddi_drv_ereport_post(handlep->ah_dip, DVR_EFMCAP,
1394 1393 NULL, DDI_NOSLEEP);
1395 1394 } else {
1396 1395 errp = hp->ahi_err;
1397 1396 otp = (on_trap_data_t *)errp->err_ontrap;
1398 1397 otp->ot_handle = (void *)(hp);
1399 1398 otp->ot_prot = OT_DATA_ACCESS;
1400 1399 if (handlep->ah_acc.devacc_attr_access ==
1401 1400 DDI_CAUTIOUS_ACC)
1402 1401 otp->ot_trampoline =
1403 1402 (uintptr_t)&i_ddi_caut_trampoline;
1404 1403 else
1405 1404 otp->ot_trampoline =
1406 1405 (uintptr_t)&i_ddi_prot_trampoline;
1407 1406 errp->err_status = DDI_FM_OK;
1408 1407 errp->err_expected = DDI_FM_ERR_UNEXPECTED;
1409 1408 errp->err_cf = impl_acc_check;
1410 1409 }
1411 1410 }
1412 1411 }
1413 1412
1414 1413 void
1415 1414 impl_acc_hdl_init(ddi_acc_hdl_t *handlep)
1416 1415 {
1417 1416 ddi_acc_impl_t *hp;
1418 1417
1419 1418 ASSERT(handlep);
1420 1419
1421 1420 hp = (ddi_acc_impl_t *)handlep;
1422 1421
1423 1422 /*
1424 1423 * check for SW byte-swapping
1425 1424 */
1426 1425 hp->ahi_get8 = i_ddi_get8;
1427 1426 hp->ahi_put8 = i_ddi_put8;
1428 1427 hp->ahi_rep_get8 = i_ddi_rep_get8;
1429 1428 hp->ahi_rep_put8 = i_ddi_rep_put8;
1430 1429 if (handlep->ah_acc.devacc_attr_endian_flags & DDI_STRUCTURE_LE_ACC) {
1431 1430 hp->ahi_get16 = i_ddi_swap_get16;
1432 1431 hp->ahi_get32 = i_ddi_swap_get32;
1433 1432 hp->ahi_get64 = i_ddi_swap_get64;
1434 1433 hp->ahi_put16 = i_ddi_swap_put16;
1435 1434 hp->ahi_put32 = i_ddi_swap_put32;
1436 1435 hp->ahi_put64 = i_ddi_swap_put64;
1437 1436 hp->ahi_rep_get16 = i_ddi_swap_rep_get16;
1438 1437 hp->ahi_rep_get32 = i_ddi_swap_rep_get32;
1439 1438 hp->ahi_rep_get64 = i_ddi_swap_rep_get64;
1440 1439 hp->ahi_rep_put16 = i_ddi_swap_rep_put16;
1441 1440 hp->ahi_rep_put32 = i_ddi_swap_rep_put32;
1442 1441 hp->ahi_rep_put64 = i_ddi_swap_rep_put64;
1443 1442 } else {
1444 1443 hp->ahi_get16 = i_ddi_get16;
1445 1444 hp->ahi_get32 = i_ddi_get32;
1446 1445 hp->ahi_get64 = i_ddi_get64;
1447 1446 hp->ahi_put16 = i_ddi_put16;
1448 1447 hp->ahi_put32 = i_ddi_put32;
1449 1448 hp->ahi_put64 = i_ddi_put64;
1450 1449 hp->ahi_rep_get16 = i_ddi_rep_get16;
1451 1450 hp->ahi_rep_get32 = i_ddi_rep_get32;
1452 1451 hp->ahi_rep_get64 = i_ddi_rep_get64;
1453 1452 hp->ahi_rep_put16 = i_ddi_rep_put16;
1454 1453 hp->ahi_rep_put32 = i_ddi_rep_put32;
1455 1454 hp->ahi_rep_put64 = i_ddi_rep_put64;
1456 1455 }
1457 1456
1458 1457 /* Legacy fault flags and support */
1459 1458 hp->ahi_fault_check = i_ddi_acc_fault_check;
1460 1459 hp->ahi_fault_notify = i_ddi_acc_fault_notify;
1461 1460 hp->ahi_fault = 0;
1462 1461 impl_acc_err_init(handlep);
1463 1462 }
1464 1463
1465 1464 void
1466 1465 i_ddi_acc_set_fault(ddi_acc_handle_t handle)
1467 1466 {
1468 1467 ddi_acc_impl_t *hp = (ddi_acc_impl_t *)handle;
1469 1468
1470 1469 if (!hp->ahi_fault) {
1471 1470 hp->ahi_fault = 1;
1472 1471 (*hp->ahi_fault_notify)(hp);
1473 1472 }
1474 1473 }
1475 1474
1476 1475 void
1477 1476 i_ddi_acc_clr_fault(ddi_acc_handle_t handle)
1478 1477 {
1479 1478 ddi_acc_impl_t *hp = (ddi_acc_impl_t *)handle;
1480 1479
1481 1480 if (hp->ahi_fault) {
1482 1481 hp->ahi_fault = 0;
1483 1482 (*hp->ahi_fault_notify)(hp);
1484 1483 }
1485 1484 }
1486 1485
1487 1486 /* ARGSUSED */
1488 1487 void
1489 1488 i_ddi_acc_fault_notify(ddi_acc_impl_t *hp)
1490 1489 {
1491 1490 /* Default version, does nothing */
1492 1491 }
1493 1492
1494 1493 /*
1495 1494 * SECTION: Misc functions
1496 1495 */
1497 1496
1498 1497 /*
1499 1498 * instance wrappers
1500 1499 */
1501 1500 /*ARGSUSED*/
1502 1501 uint_t
1503 1502 impl_assign_instance(dev_info_t *dip)
1504 1503 {
1505 1504 return ((uint_t)-1);
1506 1505 }
1507 1506
1508 1507 /*ARGSUSED*/
1509 1508 int
1510 1509 impl_keep_instance(dev_info_t *dip)
1511 1510 {
1512 1511 return (DDI_FAILURE);
1513 1512 }
1514 1513
1515 1514 /*ARGSUSED*/
1516 1515 int
1517 1516 impl_free_instance(dev_info_t *dip)
1518 1517 {
1519 1518 return (DDI_FAILURE);
1520 1519 }
1521 1520
1522 1521 /*ARGSUSED*/
1523 1522 int
1524 1523 impl_check_cpu(dev_info_t *devi)
1525 1524 {
1526 1525 return (DDI_SUCCESS);
1527 1526 }
1528 1527
1529 1528
1530 1529 static const char *nocopydevs[] = {
1531 1530 "SUNW,ffb",
1532 1531 "SUNW,afb",
1533 1532 NULL
1534 1533 };
1535 1534
1536 1535 /*
1537 1536 * Perform a copy from a memory mapped device (whose devinfo pointer is devi)
1538 1537 * separately mapped at devaddr in the kernel to a kernel buffer at kaddr.
1539 1538 */
1540 1539 /*ARGSUSED*/
1541 1540 int
1542 1541 e_ddi_copyfromdev(dev_info_t *devi,
1543 1542 off_t off, const void *devaddr, void *kaddr, size_t len)
1544 1543 {
1545 1544 const char **argv;
1546 1545
1547 1546 for (argv = nocopydevs; *argv; argv++)
1548 1547 if (strcmp(ddi_binding_name(devi), *argv) == 0) {
1549 1548 bzero(kaddr, len);
1550 1549 return (0);
1551 1550 }
1552 1551
1553 1552 bcopy(devaddr, kaddr, len);
1554 1553 return (0);
1555 1554 }
1556 1555
1557 1556 /*
1558 1557 * Perform a copy to a memory mapped device (whose devinfo pointer is devi)
1559 1558 * separately mapped at devaddr in the kernel from a kernel buffer at kaddr.
1560 1559 */
1561 1560 /*ARGSUSED*/
1562 1561 int
1563 1562 e_ddi_copytodev(dev_info_t *devi,
1564 1563 off_t off, const void *kaddr, void *devaddr, size_t len)
1565 1564 {
1566 1565 const char **argv;
1567 1566
1568 1567 for (argv = nocopydevs; *argv; argv++)
1569 1568 if (strcmp(ddi_binding_name(devi), *argv) == 0)
1570 1569 return (1);
1571 1570
1572 1571 bcopy(kaddr, devaddr, len);
1573 1572 return (0);
1574 1573 }
1575 1574
1576 1575 /*
1577 1576 * Boot Configuration
1578 1577 */
1579 1578 idprom_t idprom;
1580 1579
1581 1580 /*
1582 1581 * Configure the hardware on the system.
1583 1582 * Called before the rootfs is mounted
1584 1583 */
1585 1584 void
1586 1585 configure(void)
1587 1586 {
1588 1587 extern void i_ddi_init_root();
1589 1588
1590 1589 /* We better have released boot by this time! */
1591 1590 ASSERT(!bootops);
1592 1591
1593 1592 /*
1594 1593 * Determine whether or not to use the fpu, V9 SPARC cpus
1595 1594 * always have one. Could check for existence of a fp queue,
1596 1595 * Ultra I, II and IIa do not have a fp queue.
1597 1596 */
1598 1597 if (fpu_exists)
1599 1598 fpu_probe();
1600 1599 else
1601 1600 cmn_err(CE_CONT, "FPU not in use\n");
1602 1601
1603 1602 #if 0 /* XXXQ - not necessary for sun4u */
1604 1603 /*
1605 1604 * This following line fixes bugid 1041296; we need to do a
1606 1605 * prom_nextnode(0) because this call ALSO patches the DMA+
1607 1606 * bug in Campus-B and Phoenix. The prom uncaches the traptable
1608 1607 * page as a side-effect of devr_next(0) (which prom_nextnode calls),
1609 1608 * so this *must* be executed early on. (XXX This is untrue for sun4u)
1610 1609 */
1611 1610 (void) prom_nextnode((pnode_t)0);
1612 1611 #endif
1613 1612
1614 1613 /*
1615 1614 * Initialize devices on the machine.
1616 1615 * Uses configuration tree built by the PROMs to determine what
1617 1616 * is present, and builds a tree of prototype dev_info nodes
1618 1617 * corresponding to the hardware which identified itself.
1619 1618 */
1620 1619 i_ddi_init_root();
1621 1620
1622 1621 #ifdef DDI_PROP_DEBUG
1623 1622 (void) ddi_prop_debug(1); /* Enable property debugging */
1624 1623 #endif /* DDI_PROP_DEBUG */
1625 1624 }
1626 1625
1627 1626 /*
1628 1627 * The "status" property indicates the operational status of a device.
1629 1628 * If this property is present, the value is a string indicating the
1630 1629 * status of the device as follows:
1631 1630 *
1632 1631 * "okay" operational.
1633 1632 * "disabled" not operational, but might become operational.
1634 1633 * "fail" not operational because a fault has been detected,
1635 1634 * and it is unlikely that the device will become
1636 1635 * operational without repair. no additional details
1637 1636 * are available.
1638 1637 * "fail-xxx" not operational because a fault has been detected,
1639 1638 * and it is unlikely that the device will become
1640 1639 * operational without repair. "xxx" is additional
1641 1640 * human-readable information about the particular
1642 1641 * fault condition that was detected.
1643 1642 *
1644 1643 * The absence of this property means that the operational status is
1645 1644 * unknown or okay.
1646 1645 *
1647 1646 * This routine checks the status property of the specified device node
1648 1647 * and returns 0 if the operational status indicates failure, and 1 otherwise.
1649 1648 *
1650 1649 * The property may exist on plug-in cards the existed before IEEE 1275-1994.
1651 1650 * And, in that case, the property may not even be a string. So we carefully
1652 1651 * check for the value "fail", in the beginning of the string, noting
1653 1652 * the property length.
1654 1653 */
1655 1654 int
1656 1655 status_okay(int id, char *buf, int buflen)
1657 1656 {
1658 1657 char status_buf[OBP_MAXPROPNAME];
1659 1658 char *bufp = buf;
1660 1659 int len = buflen;
1661 1660 int proplen;
1662 1661 static const char *status = "status";
1663 1662 static const char *fail = "fail";
1664 1663 size_t fail_len = strlen(fail);
1665 1664
1666 1665 /*
1667 1666 * Get the proplen ... if it's smaller than "fail",
1668 1667 * or doesn't exist ... then we don't care, since
1669 1668 * the value can't begin with the char string "fail".
1670 1669 *
1671 1670 * NB: proplen, if it's a string, includes the NULL in the
1672 1671 * the size of the property, and fail_len does not.
1673 1672 */
1674 1673 proplen = prom_getproplen((pnode_t)id, (caddr_t)status);
1675 1674 if (proplen <= fail_len) /* nonexistent or uninteresting len */
1676 1675 return (1);
1677 1676
1678 1677 /*
1679 1678 * if a buffer was provided, use it
1680 1679 */
1681 1680 if ((buf == (char *)NULL) || (buflen <= 0)) {
1682 1681 bufp = status_buf;
1683 1682 len = sizeof (status_buf);
1684 1683 }
1685 1684 *bufp = (char)0;
1686 1685
1687 1686 /*
1688 1687 * Get the property into the buffer, to the extent of the buffer,
1689 1688 * and in case the buffer is smaller than the property size,
1690 1689 * NULL terminate the buffer. (This handles the case where
1691 1690 * a buffer was passed in and the caller wants to print the
1692 1691 * value, but the buffer was too small).
1693 1692 */
1694 1693 (void) prom_bounded_getprop((pnode_t)id, (caddr_t)status,
1695 1694 (caddr_t)bufp, len);
1696 1695 *(bufp + len - 1) = (char)0;
1697 1696
1698 1697 /*
1699 1698 * If the value begins with the char string "fail",
1700 1699 * then it means the node is failed. We don't care
1701 1700 * about any other values. We assume the node is ok
1702 1701 * although it might be 'disabled'.
1703 1702 */
1704 1703 if (strncmp(bufp, fail, fail_len) == 0)
1705 1704 return (0);
1706 1705
1707 1706 return (1);
1708 1707 }
1709 1708
1710 1709
1711 1710 /*
1712 1711 * We set the cpu type from the idprom, if we can.
1713 1712 * Note that we just read out the contents of it, for the most part.
1714 1713 */
1715 1714 void
1716 1715 setcputype(void)
1717 1716 {
1718 1717 /*
1719 1718 * We cache the idprom info early on so that we don't
1720 1719 * rummage through the NVRAM unnecessarily later.
1721 1720 */
1722 1721 (void) prom_getidprom((caddr_t)&idprom, sizeof (idprom));
1723 1722 }
1724 1723
1725 1724 /*
1726 1725 * Here is where we actually infer meanings to the members of idprom_t
1727 1726 */
1728 1727 void
1729 1728 parse_idprom(void)
1730 1729 {
1731 1730 if (idprom.id_format == IDFORM_1) {
1732 1731 (void) localetheraddr((struct ether_addr *)idprom.id_ether,
1733 1732 (struct ether_addr *)NULL);
1734 1733 (void) snprintf(hw_serial, HW_HOSTID_LEN, "%u",
1735 1734 (idprom.id_machine << 24) + idprom.id_serial);
1736 1735 } else
1737 1736 prom_printf("Invalid format code in IDprom.\n");
1738 1737 }
1739 1738
1740 1739 /*
1741 1740 * Allow for implementation specific correction of PROM property values.
1742 1741 */
1743 1742 /*ARGSUSED*/
1744 1743 void
1745 1744 impl_fix_props(dev_info_t *dip, dev_info_t *ch_dip, char *name, int len,
1746 1745 caddr_t buffer)
1747 1746 {
1748 1747 /*
1749 1748 * There are no adjustments needed in this implementation.
1750 1749 */
1751 1750 }
1752 1751
1753 1752 /*
1754 1753 * The following functions ready a cautious request to go up to the nexus
1755 1754 * driver. It is up to the nexus driver to decide how to process the request.
1756 1755 * It may choose to call i_ddi_do_caut_get/put in this file, or do it
1757 1756 * differently.
1758 1757 */
1759 1758
1760 1759 static void
1761 1760 i_ddi_caut_getput_ctlops(
1762 1761 ddi_acc_impl_t *hp, uint64_t host_addr, uint64_t dev_addr, size_t size,
1763 1762 size_t repcount, uint_t flags, ddi_ctl_enum_t cmd)
1764 1763 {
1765 1764 peekpoke_ctlops_t cautacc_ctlops_arg;
1766 1765
1767 1766 cautacc_ctlops_arg.size = size;
1768 1767 cautacc_ctlops_arg.dev_addr = dev_addr;
1769 1768 cautacc_ctlops_arg.host_addr = host_addr;
1770 1769 cautacc_ctlops_arg.handle = (ddi_acc_handle_t)hp;
1771 1770 cautacc_ctlops_arg.repcount = repcount;
1772 1771 cautacc_ctlops_arg.flags = flags;
1773 1772
1774 1773 (void) ddi_ctlops(hp->ahi_common.ah_dip, hp->ahi_common.ah_dip, cmd,
1775 1774 &cautacc_ctlops_arg, NULL);
1776 1775 }
1777 1776
1778 1777 uint8_t
1779 1778 i_ddi_caut_get8(ddi_acc_impl_t *hp, uint8_t *addr)
1780 1779 {
1781 1780 uint8_t value;
1782 1781 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1783 1782 sizeof (uint8_t), 1, 0, DDI_CTLOPS_PEEK);
1784 1783
1785 1784 return (value);
1786 1785 }
1787 1786
1788 1787 uint16_t
1789 1788 i_ddi_caut_get16(ddi_acc_impl_t *hp, uint16_t *addr)
1790 1789 {
1791 1790 uint16_t value;
1792 1791 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1793 1792 sizeof (uint16_t), 1, 0, DDI_CTLOPS_PEEK);
1794 1793
1795 1794 return (value);
1796 1795 }
1797 1796
1798 1797 uint32_t
1799 1798 i_ddi_caut_get32(ddi_acc_impl_t *hp, uint32_t *addr)
1800 1799 {
1801 1800 uint32_t value;
1802 1801 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1803 1802 sizeof (uint32_t), 1, 0, DDI_CTLOPS_PEEK);
1804 1803
1805 1804 return (value);
1806 1805 }
1807 1806
1808 1807 uint64_t
1809 1808 i_ddi_caut_get64(ddi_acc_impl_t *hp, uint64_t *addr)
1810 1809 {
1811 1810 uint64_t value;
1812 1811 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1813 1812 sizeof (uint64_t), 1, 0, DDI_CTLOPS_PEEK);
1814 1813
1815 1814 return (value);
1816 1815 }
1817 1816
1818 1817 void
1819 1818 i_ddi_caut_put8(ddi_acc_impl_t *hp, uint8_t *addr, uint8_t value)
1820 1819 {
1821 1820 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1822 1821 sizeof (uint8_t), 1, 0, DDI_CTLOPS_POKE);
1823 1822 }
1824 1823
1825 1824 void
1826 1825 i_ddi_caut_put16(ddi_acc_impl_t *hp, uint16_t *addr, uint16_t value)
1827 1826 {
1828 1827 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1829 1828 sizeof (uint16_t), 1, 0, DDI_CTLOPS_POKE);
1830 1829 }
1831 1830
1832 1831 void
1833 1832 i_ddi_caut_put32(ddi_acc_impl_t *hp, uint32_t *addr, uint32_t value)
1834 1833 {
1835 1834 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1836 1835 sizeof (uint32_t), 1, 0, DDI_CTLOPS_POKE);
1837 1836 }
1838 1837
1839 1838 void
1840 1839 i_ddi_caut_put64(ddi_acc_impl_t *hp, uint64_t *addr, uint64_t value)
1841 1840 {
1842 1841 i_ddi_caut_getput_ctlops(hp, (uint64_t)&value, (uint64_t)addr,
1843 1842 sizeof (uint64_t), 1, 0, DDI_CTLOPS_POKE);
1844 1843 }
1845 1844
1846 1845 void
1847 1846 i_ddi_caut_rep_get8(ddi_acc_impl_t *hp, uint8_t *host_addr, uint8_t *dev_addr,
1848 1847 size_t repcount, uint_t flags)
1849 1848 {
1850 1849 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1851 1850 sizeof (uint8_t), repcount, flags, DDI_CTLOPS_PEEK);
1852 1851 }
1853 1852
1854 1853 void
1855 1854 i_ddi_caut_rep_get16(ddi_acc_impl_t *hp, uint16_t *host_addr,
1856 1855 uint16_t *dev_addr, size_t repcount, uint_t flags)
1857 1856 {
1858 1857 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1859 1858 sizeof (uint16_t), repcount, flags, DDI_CTLOPS_PEEK);
1860 1859 }
1861 1860
1862 1861 void
1863 1862 i_ddi_caut_rep_get32(ddi_acc_impl_t *hp, uint32_t *host_addr,
1864 1863 uint32_t *dev_addr, size_t repcount, uint_t flags)
1865 1864 {
1866 1865 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1867 1866 sizeof (uint32_t), repcount, flags, DDI_CTLOPS_PEEK);
1868 1867 }
1869 1868
1870 1869 void
1871 1870 i_ddi_caut_rep_get64(ddi_acc_impl_t *hp, uint64_t *host_addr,
1872 1871 uint64_t *dev_addr, size_t repcount, uint_t flags)
1873 1872 {
1874 1873 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1875 1874 sizeof (uint64_t), repcount, flags, DDI_CTLOPS_PEEK);
1876 1875 }
1877 1876
1878 1877 void
1879 1878 i_ddi_caut_rep_put8(ddi_acc_impl_t *hp, uint8_t *host_addr, uint8_t *dev_addr,
1880 1879 size_t repcount, uint_t flags)
1881 1880 {
1882 1881 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1883 1882 sizeof (uint8_t), repcount, flags, DDI_CTLOPS_POKE);
1884 1883 }
1885 1884
1886 1885 void
1887 1886 i_ddi_caut_rep_put16(ddi_acc_impl_t *hp, uint16_t *host_addr,
1888 1887 uint16_t *dev_addr, size_t repcount, uint_t flags)
1889 1888 {
1890 1889 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1891 1890 sizeof (uint16_t), repcount, flags, DDI_CTLOPS_POKE);
1892 1891 }
1893 1892
1894 1893 void
1895 1894 i_ddi_caut_rep_put32(ddi_acc_impl_t *hp, uint32_t *host_addr,
1896 1895 uint32_t *dev_addr, size_t repcount, uint_t flags)
1897 1896 {
1898 1897 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1899 1898 sizeof (uint32_t), repcount, flags, DDI_CTLOPS_POKE);
1900 1899 }
1901 1900
1902 1901 void
1903 1902 i_ddi_caut_rep_put64(ddi_acc_impl_t *hp, uint64_t *host_addr,
1904 1903 uint64_t *dev_addr, size_t repcount, uint_t flags)
1905 1904 {
1906 1905 i_ddi_caut_getput_ctlops(hp, (uint64_t)host_addr, (uint64_t)dev_addr,
1907 1906 sizeof (uint64_t), repcount, flags, DDI_CTLOPS_POKE);
1908 1907 }
1909 1908
1910 1909 /*
1911 1910 * This is called only to process peek/poke when the DIP is NULL.
1912 1911 * Assume that this is for memory, as nexi take care of device safe accesses.
1913 1912 */
1914 1913 int
1915 1914 peekpoke_mem(ddi_ctl_enum_t cmd, peekpoke_ctlops_t *in_args)
1916 1915 {
1917 1916 int err = DDI_SUCCESS;
1918 1917 on_trap_data_t otd;
1919 1918
1920 1919 /* Set up protected environment. */
1921 1920 if (!on_trap(&otd, OT_DATA_ACCESS)) {
1922 1921 uintptr_t tramp = otd.ot_trampoline;
1923 1922
1924 1923 if (cmd == DDI_CTLOPS_POKE) {
1925 1924 otd.ot_trampoline = (uintptr_t)&poke_fault;
1926 1925 err = do_poke(in_args->size, (void *)in_args->dev_addr,
1927 1926 (void *)in_args->host_addr);
1928 1927 } else {
1929 1928 otd.ot_trampoline = (uintptr_t)&peek_fault;
1930 1929 err = do_peek(in_args->size, (void *)in_args->dev_addr,
1931 1930 (void *)in_args->host_addr);
1932 1931 }
1933 1932 otd.ot_trampoline = tramp;
1934 1933 } else
1935 1934 err = DDI_FAILURE;
1936 1935
1937 1936 /* Take down protected environment. */
1938 1937 no_trap();
1939 1938
1940 1939 return (err);
1941 1940 }
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