362 struct kstat_named vis_fmul8x16au;
363 struct kstat_named vis_fmul8x16al;
364 struct kstat_named vis_fmul8sux16;
365 struct kstat_named vis_fmul8ulx16;
366 struct kstat_named vis_fmuld8sux16;
367 struct kstat_named vis_fmuld8ulx16;
368 struct kstat_named vis_fpack16;
369 struct kstat_named vis_fpack32;
370 struct kstat_named vis_fpackfix;
371 struct kstat_named vis_fexpand;
372 struct kstat_named vis_fpmerge;
373 struct kstat_named vis_pdist;
374 struct kstat_named vis_pdistn;
375 struct kstat_named vis_bshuffle;
376 };
377
378 #define VISINFO_KSTAT(opcode) { \
379 extern void __dtrace_probe___visinfo_##opcode(uint64_t *); \
380 uint64_t *stataddr = &visinfo.opcode.value.ui64; \
381 __dtrace_probe___visinfo_##opcode(stataddr); \
382 atomic_add_64(&visinfo.opcode.value.ui64, 1); \
383 }
384
385
386 /* PUBLIC FUNCTIONS */
387
388 #ifdef __STDC__
389
390 /*
391 * fpu_vis_sim simulates FPU VIS Partial load store instructions; reads and
392 * writes FPU data registers directly or works with the PCB image if fpu_exists
393 * is 0.
394 */
395 extern enum ftt_type fpu_vis_sim(fp_simd_type *pfpsd, fp_inst_type *pinst,
396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
397 /*
398 * fpu_simulator simulates FPU instructions only; reads and writes FPU data
399 * registers directly.
400 */
401 extern enum ftt_type fpu_simulator(fp_simd_type *pfpsd, fp_inst_type *pinst,
402 fsr_type *pfsr, uint64_t gsr, uint32_t inst);
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362 struct kstat_named vis_fmul8x16au;
363 struct kstat_named vis_fmul8x16al;
364 struct kstat_named vis_fmul8sux16;
365 struct kstat_named vis_fmul8ulx16;
366 struct kstat_named vis_fmuld8sux16;
367 struct kstat_named vis_fmuld8ulx16;
368 struct kstat_named vis_fpack16;
369 struct kstat_named vis_fpack32;
370 struct kstat_named vis_fpackfix;
371 struct kstat_named vis_fexpand;
372 struct kstat_named vis_fpmerge;
373 struct kstat_named vis_pdist;
374 struct kstat_named vis_pdistn;
375 struct kstat_named vis_bshuffle;
376 };
377
378 #define VISINFO_KSTAT(opcode) { \
379 extern void __dtrace_probe___visinfo_##opcode(uint64_t *); \
380 uint64_t *stataddr = &visinfo.opcode.value.ui64; \
381 __dtrace_probe___visinfo_##opcode(stataddr); \
382 atomic_inc_64(&visinfo.opcode.value.ui64); \
383 }
384
385
386 /* PUBLIC FUNCTIONS */
387
388 #ifdef __STDC__
389
390 /*
391 * fpu_vis_sim simulates FPU VIS Partial load store instructions; reads and
392 * writes FPU data registers directly or works with the PCB image if fpu_exists
393 * is 0.
394 */
395 extern enum ftt_type fpu_vis_sim(fp_simd_type *pfpsd, fp_inst_type *pinst,
396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
397 /*
398 * fpu_simulator simulates FPU instructions only; reads and writes FPU data
399 * registers directly.
400 */
401 extern enum ftt_type fpu_simulator(fp_simd_type *pfpsd, fp_inst_type *pinst,
402 fsr_type *pfsr, uint64_t gsr, uint32_t inst);
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