474 faultcode_t pagefault(), res, errcode;
475 enum fault_type fault_type;
476 k_siginfo_t siginfo;
477 uint_t fault = 0;
478 int mstate;
479 int sicode = 0;
480 int watchcode;
481 int watchpage;
482 caddr_t vaddr;
483 int singlestep_twiddle;
484 size_t sz;
485 int ta;
486 #ifdef __amd64
487 uchar_t instr;
488 #endif
489
490 ASSERT_STACK_ALIGNED();
491
492 type = rp->r_trapno;
493 CPU_STATS_ADDQ(CPU, sys, trap, 1);
494 ASSERT(ct->t_schedflag & TS_DONT_SWAP);
495
496 if (type == T_PGFLT) {
497
498 errcode = rp->r_err;
499 if (errcode & PF_ERR_WRITE)
500 rw = S_WRITE;
501 else if ((caddr_t)rp->r_pc == addr ||
502 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC)))
503 rw = S_EXEC;
504 else
505 rw = S_READ;
506
507 #if defined(__i386)
508 /*
509 * Pentium Pro work-around
510 */
511 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) {
512 uint_t attr;
513 uint_t priv_violation;
514 uint_t access_violation;
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474 faultcode_t pagefault(), res, errcode;
475 enum fault_type fault_type;
476 k_siginfo_t siginfo;
477 uint_t fault = 0;
478 int mstate;
479 int sicode = 0;
480 int watchcode;
481 int watchpage;
482 caddr_t vaddr;
483 int singlestep_twiddle;
484 size_t sz;
485 int ta;
486 #ifdef __amd64
487 uchar_t instr;
488 #endif
489
490 ASSERT_STACK_ALIGNED();
491
492 type = rp->r_trapno;
493 CPU_STATS_ADDQ(CPU, sys, trap, 1);
494
495 if (type == T_PGFLT) {
496
497 errcode = rp->r_err;
498 if (errcode & PF_ERR_WRITE)
499 rw = S_WRITE;
500 else if ((caddr_t)rp->r_pc == addr ||
501 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC)))
502 rw = S_EXEC;
503 else
504 rw = S_READ;
505
506 #if defined(__i386)
507 /*
508 * Pentium Pro work-around
509 */
510 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) {
511 uint_t attr;
512 uint_t priv_violation;
513 uint_t access_violation;
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