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--- old/usr/src/uts/sun4u/os/mach_cpu_states.c
+++ new/usr/src/uts/sun4u/os/mach_cpu_states.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
23 23 *
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 #include <sys/types.h>
28 28 #include <sys/t_lock.h>
29 29 #include <sys/uadmin.h>
30 30 #include <sys/panic.h>
31 31 #include <sys/reboot.h>
32 32 #include <sys/autoconf.h>
33 33 #include <sys/machsystm.h>
34 34 #include <sys/promif.h>
35 35 #include <sys/membar.h>
36 36 #include <vm/hat_sfmmu.h>
37 37 #include <sys/cpu_module.h>
38 38 #include <sys/cpu_sgnblk_defs.h>
39 39 #include <sys/intreg.h>
40 40 #include <sys/consdev.h>
41 41 #include <sys/kdi_impl.h>
42 42 #include <sys/callb.h>
43 43 #include <sys/dumphdr.h>
44 44
45 45 #ifdef TRAPTRACE
46 46 #include <sys/traptrace.h>
47 47 u_longlong_t panic_tick;
48 48 #endif /* TRAPTRACE */
49 49
50 50 extern u_longlong_t gettick();
51 51 static void reboot_machine(char *);
52 52 int disable_watchdog_on_exit = 0;
53 53 extern uint64_t cpc_level15_inum;
54 54
55 55 /*
56 56 * Machine dependent code to reboot.
57 57 * "mdep" is interpreted as a character pointer; if non-null, it is a pointer
58 58 * to a string to be used as the argument string when rebooting.
59 59 *
60 60 * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
61 61 * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
62 62 * we are in a normal shutdown sequence (interrupts are not blocked, the
63 63 * system is not panic'ing or being suspended).
64 64 */
65 65 /*ARGSUSED*/
66 66 void
67 67 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
68 68 {
69 69 extern void pm_cfb_check_and_powerup(void);
70 70
71 71 /*
72 72 * Disable the hw watchdog timer.
73 73 */
74 74 if (disable_watchdog_on_exit && watchdog_activated) {
75 75 mutex_enter(&tod_lock);
76 76 (void) tod_ops.tod_clear_watchdog_timer();
77 77 mutex_exit(&tod_lock);
78 78 }
79 79
80 80 /*
81 81 * XXX - rconsvp is set to NULL to ensure that output messages
82 82 * are sent to the underlying "hardware" device using the
83 83 * monitor's printf routine since we are in the process of
84 84 * either rebooting or halting the machine.
85 85 */
86 86 rconsvp = NULL;
87 87
88 88 /*
89 89 * At a high interrupt level we can't:
90 90 * 1) bring up the console
91 91 * or
92 92 * 2) wait for pending interrupts prior to redistribution
93 93 * to the current CPU
94 94 *
95 95 * so we do them now.
96 96 */
97 97 pm_cfb_check_and_powerup();
98 98
99 99 /* make sure there are no more changes to the device tree */
100 100 devtree_freeze();
101 101
102 102 if (invoke_cb)
103 103 (void) callb_execute_class(CB_CL_MDBOOT, NULL);
104 104
105 105 /*
106 106 * Clear any unresolved UEs from memory.
107 107 */
108 108 page_retire_mdboot();
109 109
110 110 /*
111 111 * stop other cpus which also raise our priority. since there is only
112 112 * one active cpu after this, and our priority will be too high
113 113 * for us to be preempted, we're essentially single threaded
114 114 * from here on out.
115 115 */
116 116 stop_other_cpus();
117 117
118 118 /*
119 119 * try and reset leaf devices. reset_leaves() should only
120 120 * be called when there are no other threads that could be
121 121 * accessing devices
122 122 */
123 123 reset_leaves();
124 124
125 125 if (fcn == AD_HALT) {
126 126 halt((char *)NULL);
127 127 } else if (fcn == AD_POWEROFF) {
128 128 power_down(NULL);
129 129 } else {
130 130 if (bootstr == NULL) {
131 131 switch (fcn) {
132 132
133 133 case AD_FASTREBOOT:
134 134 case AD_BOOT:
135 135 bootstr = "";
136 136 break;
137 137
138 138 case AD_IBOOT:
139 139 bootstr = "-a";
140 140 break;
141 141
142 142 case AD_SBOOT:
143 143 bootstr = "-s";
144 144 break;
145 145
146 146 case AD_SIBOOT:
147 147 bootstr = "-sa";
148 148 break;
149 149 default:
150 150 cmn_err(CE_WARN,
151 151 "mdboot: invalid function %d", fcn);
152 152 bootstr = "";
153 153 break;
154 154 }
155 155 }
156 156 if (fcn == AD_FASTREBOOT) {
157 157 pnode_t onode;
158 158 int dllen;
159 159 onode = prom_optionsnode();
160 160 if ((onode == OBP_NONODE) || (onode == OBP_BADNODE)) {
161 161 cmn_err(CE_WARN, "Unable to set diag level for"
162 162 " quick reboot");
163 163 } else {
164 164 dllen = prom_getproplen(onode, "diag-level");
165 165 if (dllen != -1) {
166 166 char *newstr = kmem_alloc(strlen(
167 167 bootstr) + dllen + 5, KM_NOSLEEP);
168 168 if (newstr != NULL) {
169 169 int newstrlen;
170 170 (void) strcpy(newstr, bootstr);
171 171 (void) strcat(newstr, " -f ");
172 172 newstrlen = strlen(bootstr) + 4;
173 173 (void) prom_getprop(onode,
174 174 "diag-level",
175 175 (caddr_t)
176 176 &(newstr[newstrlen]));
177 177 newstr[newstrlen + dllen] =
178 178 '\0';
179 179 bootstr = newstr;
180 180 (void) prom_setprop(onode,
181 181 "diag-level",
182 182 "off", 4);
183 183 }
184 184 }
185 185 }
186 186 }
187 187 reboot_machine(bootstr);
188 188 }
189 189 /* MAYBE REACHED */
190 190 }
191 191
192 192 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
193 193 /*ARGSUSED*/
194 194 void
195 195 mdpreboot(int cmd, int fcn, char *bootstr)
196 196 {
197 197 }
198 198
199 199 /*
200 200 * Halt the machine and then reboot with the device
201 201 * and arguments specified in bootstr.
202 202 */
203 203 static void
204 204 reboot_machine(char *bootstr)
205 205 {
206 206 flush_windows();
207 207 stop_other_cpus(); /* send stop signal to other CPUs */
208 208 prom_printf("rebooting...\n");
209 209 /*
210 210 * For platforms that use CPU signatures, we
211 211 * need to set the signature block to OS and
212 212 * the state to exiting for all the processors.
213 213 */
214 214 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
215 215 prom_reboot(bootstr);
216 216 /*NOTREACHED*/
217 217 }
218 218
219 219 /*
220 220 * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
221 221 * Once in panic_idle() they raise spl, record their location, and spin.
222 222 */
223 223 static void
224 224 panic_idle(void)
225 225 {
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226 226 cpu_async_panic_callb(); /* check for async errors */
227 227
228 228 (void) spl7();
229 229
230 230 debug_flush_windows();
231 231 (void) setjmp(&curthread->t_pcb);
232 232
233 233 CPU->cpu_m.in_prom = 1;
234 234 membar_stld();
235 235
236 - dumpsys_helper();
237 -
238 236 for (;;)
239 237 continue;
240 238 }
241 239
242 240 /*
243 241 * Force the other CPUs to trap into panic_idle(), and then remove them
244 242 * from the cpu_ready_set so they will no longer receive cross-calls.
245 243 */
246 244 /*ARGSUSED*/
247 245 void
248 246 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
249 247 {
250 248 cpuset_t cps;
251 249 int i;
252 250
253 251 (void) splzs();
254 252 CPUSET_ALL_BUT(cps, cp->cpu_id);
255 253 xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
256 254
257 255 for (i = 0; i < NCPU; i++) {
258 256 if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
259 257 int ntries = 0x10000;
260 258
261 259 while (!cpu[i]->cpu_m.in_prom && ntries) {
262 260 DELAY(50);
263 261 ntries--;
264 262 }
265 263
266 264 if (!cpu[i]->cpu_m.in_prom)
267 265 printf("panic: failed to stop cpu%d\n", i);
268 266
269 267 cpu[i]->cpu_flags &= ~CPU_READY;
270 268 cpu[i]->cpu_flags |= CPU_QUIESCED;
271 269 CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
272 270 }
273 271 }
274 272 }
275 273
276 274 /*
277 275 * Platform callback following each entry to panicsys(). If we've panicked at
278 276 * level 14, we examine t_panic_trap to see if a fatal trap occurred. If so,
279 277 * we disable further %tick_cmpr interrupts. If not, an explicit call to panic
280 278 * was made and so we re-enqueue an interrupt request structure to allow
281 279 * further level 14 interrupts to be processed once we lower PIL. This allows
282 280 * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
283 281 *
284 282 * In case we panic at level 15, ensure that the cpc handler has been
285 283 * reinstalled otherwise we could run the risk of hitting a missing interrupt
286 284 * handler when this thread drops PIL and the cpc counter overflows.
287 285 */
288 286 void
289 287 panic_enter_hw(int spl)
290 288 {
291 289 uint_t opstate;
292 290
293 291 if (spl == ipltospl(PIL_14)) {
294 292 opstate = disable_vec_intr();
295 293
296 294 if (curthread->t_panic_trap != NULL) {
297 295 tickcmpr_disable();
298 296 intr_dequeue_req(PIL_14, cbe_level14_inum);
299 297 } else {
300 298 if (!tickcmpr_disabled())
301 299 intr_enqueue_req(PIL_14, cbe_level14_inum);
302 300 /*
303 301 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
304 302 * and SOFTINT<16> (STICK_INT) to indicate
305 303 * that the current level 14 has been serviced.
306 304 */
307 305 wr_clr_softint((1 << PIL_14) |
308 306 TICK_INT_MASK | STICK_INT_MASK);
309 307 }
310 308
311 309 enable_vec_intr(opstate);
312 310 } else if (spl == ipltospl(PIL_15)) {
313 311 opstate = disable_vec_intr();
314 312 intr_enqueue_req(PIL_15, cpc_level15_inum);
315 313 wr_clr_softint(1 << PIL_15);
316 314 enable_vec_intr(opstate);
317 315 }
318 316 }
319 317
320 318 /*
321 319 * Miscellaneous hardware-specific code to execute after panicstr is set
322 320 * by the panic code: we also print and record PTL1 panic information here.
323 321 */
324 322 /*ARGSUSED*/
325 323 void
326 324 panic_quiesce_hw(panic_data_t *pdp)
327 325 {
328 326 extern uint_t getpstate(void);
329 327 extern void setpstate(uint_t);
330 328
331 329 #ifdef TRAPTRACE
332 330 /*
333 331 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
334 332 */
335 333 if (!panic_tick)
336 334 panic_tick = gettick();
337 335 TRAPTRACE_FREEZE;
338 336 #endif
339 337 /*
340 338 * For Platforms that use CPU signatures, we
341 339 * need to set the signature block to OS, the state to
342 340 * exiting, and the substate to panic for all the processors.
343 341 */
344 342 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
345 343
346 344 /*
347 345 * De-activate ECC functions and disable the watchdog timer now that
348 346 * we've made it through the critical part of the panic code.
349 347 */
350 348 if (watchdog_enable)
351 349 (void) tod_ops.tod_clear_watchdog_timer();
352 350
353 351 /*
354 352 * Disable further ECC errors from the CPU module and the bus nexus.
355 353 */
356 354 cpu_disable_errors();
357 355 (void) bus_func_invoke(BF_TYPE_ERRDIS);
358 356
359 357 /*
360 358 * Redirect all interrupts to the current CPU.
361 359 */
362 360 intr_redist_all_cpus_shutdown();
363 361
364 362 /*
365 363 * This call exists solely to support dumps to network
366 364 * devices after sync from OBP.
367 365 *
368 366 * If we came here via the sync callback, then on some
369 367 * platforms, interrupts may have arrived while we were
370 368 * stopped in OBP. OBP will arrange for those interrupts to
371 369 * be redelivered if you say "go", but not if you invoke a
372 370 * client callback like 'sync'. For some dump devices
373 371 * (network swap devices), we need interrupts to be
374 372 * delivered in order to dump, so we have to call the bus
375 373 * nexus driver to reset the interrupt state machines.
376 374 */
377 375 (void) bus_func_invoke(BF_TYPE_RESINTR);
378 376
379 377 setpstate(getpstate() | PSTATE_IE);
380 378 }
381 379
382 380 /*
383 381 * Platforms that use CPU signatures need to set the signature block to OS and
384 382 * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
385 383 * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
386 384 * reboot the machine if the dump never completes.
387 385 */
388 386 /*ARGSUSED*/
389 387 void
390 388 panic_dump_hw(int spl)
391 389 {
392 390 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
393 391 }
394 392
395 393 /*
396 394 * for ptl1_panic
397 395 */
398 396 void
399 397 ptl1_init_cpu(struct cpu *cpu)
400 398 {
401 399 ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
402 400
403 401 /*CONSTCOND*/
404 402 if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
405 403 panic("ptl1_init_cpu: not enough space left for ptl1_panic "
406 404 "stack, sizeof (struct cpu) = %lu", sizeof (struct cpu));
407 405 }
408 406
409 407 pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
410 408 cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
411 409 }
412 410
413 411 void
414 412 ptl1_panic_handler(ptl1_state_t *pstate)
415 413 {
416 414 static const char *ptl1_reasons[] = {
417 415 #ifdef PTL1_PANIC_DEBUG
418 416 "trap for debug purpose", /* PTL1_BAD_DEBUG */
419 417 #else
420 418 "unknown trap", /* PTL1_BAD_DEBUG */
421 419 #endif
422 420 "register window trap", /* PTL1_BAD_WTRAP */
423 421 "kernel MMU miss", /* PTL1_BAD_KMISS */
424 422 "kernel protection fault", /* PTL1_BAD_KPROT_FAULT */
425 423 "ISM MMU miss", /* PTL1_BAD_ISM */
426 424 "kernel MMU trap", /* PTL1_BAD_MMUTRAP */
427 425 "kernel trap handler state", /* PTL1_BAD_TRAP */
428 426 "floating point trap", /* PTL1_BAD_FPTRAP */
429 427 #ifdef DEBUG
430 428 "pointer to intr_vec", /* PTL1_BAD_INTR_VEC */
431 429 #else
432 430 "unknown trap", /* PTL1_BAD_INTR_VEC */
433 431 #endif
434 432 #ifdef TRAPTRACE
435 433 "TRACE_PTR state", /* PTL1_BAD_TRACE_PTR */
436 434 #else
437 435 "unknown trap", /* PTL1_BAD_TRACE_PTR */
438 436 #endif
439 437 "stack overflow", /* PTL1_BAD_STACK */
440 438 "DTrace flags", /* PTL1_BAD_DTRACE_FLAGS */
441 439 "attempt to steal locked ctx", /* PTL1_BAD_CTX_STEAL */
442 440 "CPU ECC error loop", /* PTL1_BAD_ECC */
443 441 "non-kernel context in sys/priv_trap() below or",
444 442 /* PTL1_BAD_CTX */
445 443 "error raising a TSB exception", /* PTL1_BAD_RAISE_TSBEXCP */
446 444 "missing shared TSB" /* PTL1_NO_SCDTSB8K */
447 445 };
448 446
449 447 uint_t reason = pstate->ptl1_regs.ptl1_g1;
450 448 uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
451 449 struct panic_trap_info ti = { 0 };
452 450
453 451 /*
454 452 * Use trap_info for a place holder to call panic_savetrap() and
455 453 * panic_showtrap() to save and print out ptl1_panic information.
456 454 */
457 455 if (curthread->t_panic_trap == NULL)
458 456 curthread->t_panic_trap = &ti;
459 457
460 458 if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
461 459 panic("bad %s at TL %u", ptl1_reasons[reason], tl);
462 460 else
463 461 panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
464 462 }
465 463
466 464 void
467 465 clear_watchdog_on_exit()
468 466 {
469 467 /*
470 468 * Only shut down an active hardware watchdog timer if the platform
471 469 * has expressed an interest to.
472 470 */
473 471 if (disable_watchdog_on_exit && watchdog_activated) {
474 472 prom_printf("Debugging requested; hardware watchdog "
475 473 "disabled; reboot to re-enable.\n");
476 474 cmn_err(CE_WARN, "!Debugging requested; hardware watchdog "
477 475 "disabled; reboot to re-enable.");
478 476 mutex_enter(&tod_lock);
479 477 (void) tod_ops.tod_clear_watchdog_timer();
480 478 mutex_exit(&tod_lock);
481 479 }
482 480 }
483 481
484 482 /*
485 483 * This null routine is only used by sun4v watchdog timer support.
486 484 */
487 485 void
488 486 restore_watchdog_on_entry(void)
489 487 {
490 488 }
491 489
492 490 int
493 491 kdi_watchdog_disable(void)
494 492 {
495 493 if (watchdog_activated) {
496 494 mutex_enter(&tod_lock);
497 495 (void) tod_ops.tod_clear_watchdog_timer();
498 496 mutex_exit(&tod_lock);
499 497 }
500 498
501 499 return (watchdog_activated);
502 500 }
503 501
504 502 void
505 503 kdi_watchdog_restore(void)
506 504 {
507 505 if (watchdog_enable) {
508 506 mutex_enter(&tod_lock);
509 507 (void) tod_ops.tod_set_watchdog_timer(watchdog_timeout_seconds);
510 508 mutex_exit(&tod_lock);
511 509 }
512 510 }
513 511
514 512 /*ARGSUSED*/
515 513 void
516 514 mach_dump_buffer_init(void)
517 515 {
518 516 /*
519 517 * setup dump buffer to store extra crash information
520 518 * not applicable to sun4u
521 519 */
522 520 }
523 521
524 522 /*
525 523 * xt_sync - wait for previous x-traps to finish
526 524 */
527 525 void
528 526 xt_sync(cpuset_t cpuset)
529 527 {
530 528 kpreempt_disable();
531 529 CPUSET_DEL(cpuset, CPU->cpu_id);
532 530 CPUSET_AND(cpuset, cpu_ready_set);
533 531 xt_some(cpuset, (xcfunc_t *)xt_sync_tl1, 0, 0);
534 532 kpreempt_enable();
535 533 }
536 534
537 535 /*
538 536 * mach_soft_state_init() - dummy routine for sun4v soft state
539 537 */
540 538 void
541 539 mach_soft_state_init(void)
542 540 {}
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