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XXXX introduce drv_sectohz

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          --- old/usr/src/uts/intel/io/scsi/adapters/arcmsr/arcmsr.c
          +++ new/usr/src/uts/intel/io/scsi/adapters/arcmsr/arcmsr.c
↓ open down ↓ 322 lines elided ↑ open up ↑
 323  323                  if (hba_trans == NULL) {
 324  324                          return (DDI_FAILURE);
 325  325                  }
 326  326                  acb = hba_trans->tran_hba_private;
 327  327                  mutex_enter(&acb->acb_mutex);
 328  328                  arcmsr_iop_init(acb);
 329  329  
 330  330                  /* restart ccbs "timeout" watchdog */
 331  331                  acb->timeout_count = 0;
 332  332                  acb->timeout_id = timeout(arcmsr_ccbs_timeout, (caddr_t)acb,
 333      -                    (ARCMSR_TIMEOUT_WATCH * drv_usectohz(1000000)));
      333 +                    drv_sectohz(ARCMSR_TIMEOUT_WATCH));
 334  334                  acb->timeout_sc_id = timeout(arcmsr_devMap_monitor,
 335  335                      (caddr_t)acb,
 336      -                    (ARCMSR_DEV_MAP_WATCH * drv_usectohz(1000000)));
      336 +                    drv_sectohz(ARCMSR_DEV_MAP_WATCH));
 337  337                  mutex_exit(&acb->acb_mutex);
 338  338                  return (DDI_SUCCESS);
 339  339  
 340  340          default:
 341  341                  return (DDI_FAILURE);
 342  342          }
 343  343  }
 344  344  
 345  345  /*
 346  346   *    Function: arcmsr_detach(9E)
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2947 2947          /* Create a taskq for dealing with dr events */
2948 2948          if ((acb->taskq = ddi_taskq_create(dev_info, "arcmsr_dr_taskq", 1,
2949 2949              TASKQ_DEFAULTPRI, 0)) == NULL) {
2950 2950                  arcmsr_warn(acb, "ddi_taskq_create failed");
2951 2951                  goto error_level_8;
2952 2952          }
2953 2953  
2954 2954          acb->timeout_count = 0;
2955 2955          /* active ccbs "timeout" watchdog */
2956 2956          acb->timeout_id = timeout(arcmsr_ccbs_timeout, (caddr_t)acb,
2957      -            (ARCMSR_TIMEOUT_WATCH * drv_usectohz(1000000)));
     2957 +            drv_sectohz(ARCMSR_TIMEOUT_WATCH));
2958 2958          acb->timeout_sc_id = timeout(arcmsr_devMap_monitor, (caddr_t)acb,
2959      -            (ARCMSR_DEV_MAP_WATCH * drv_usectohz(1000000)));
     2959 +            drv_sectohz(ARCMSR_DEV_MAP_WATCH));
2960 2960  
2961 2961          /* report device info */
2962 2962          ddi_report_dev(dev_info);
2963 2963  
2964 2964          return (DDI_SUCCESS);
2965 2965  
2966 2966  error_level_8:
2967 2967  
2968 2968  error_level_7:
2969 2969  error_level_6:
↓ open down ↓ 185 lines elided ↑ open up ↑
3155 3155          mutex_enter(&acb->isr_mutex);
3156 3156          if (acb->ccboutstandingcount != 0) {
3157 3157                  /* check each ccb */
3158 3158                  i = ddi_dma_sync(acb->ccbs_pool_handle, 0, 0,
3159 3159                      DDI_DMA_SYNC_FORKERNEL);
3160 3160                  if (i != DDI_SUCCESS) {
3161 3161                          if ((acb->timeout_id != 0) &&
3162 3162                              ((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0)) {
3163 3163                                  /* do pkt timeout check each 60 secs */
3164 3164                                  acb->timeout_id = timeout(arcmsr_ccbs_timeout,
3165      -                                    (void*)acb, (ARCMSR_TIMEOUT_WATCH *
3166      -                                    drv_usectohz(1000000)));
     3165 +                                    (void*)acb, drv_sectohz(ARCMSR_TIMEOUT_WATCH));
3167 3166                          }
3168 3167                          mutex_exit(&acb->isr_mutex);
3169 3168                          arcmsr_enable_allintr(acb, intmask_org);
3170 3169                          return;
3171 3170                  }
3172 3171                  instance = ddi_get_instance(acb->dev_info);
3173 3172                  for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3174 3173                          ccb = acb->pccb_pool[i];
3175 3174                          if (ccb->acb != acb) {
3176 3175                                  break;
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3206 3205                          } else if ((ccb->ccb_state & ARCMSR_CCB_CAN_BE_FREE) ==
3207 3206                              ARCMSR_CCB_CAN_BE_FREE) {
3208 3207                                  arcmsr_free_ccb(ccb);
3209 3208                          }
3210 3209                  }
3211 3210          }
3212 3211          if ((acb->timeout_id != 0) &&
3213 3212              ((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0)) {
3214 3213                  /* do pkt timeout check each 60 secs */
3215 3214                  acb->timeout_id = timeout(arcmsr_ccbs_timeout,
3216      -                    (void*)acb, (ARCMSR_TIMEOUT_WATCH * drv_usectohz(1000000)));
     3215 +                    (void*)acb, drv_sectohz(ARCMSR_TIMEOUT_WATCH));
3217 3216          }
3218 3217          mutex_exit(&acb->isr_mutex);
3219 3218          arcmsr_enable_allintr(acb, intmask_org);
3220 3219  }
3221 3220  
3222 3221  static void
3223 3222  arcmsr_abort_dr_ccbs(struct ACB *acb, uint16_t target, uint8_t lun)
3224 3223  {
3225 3224          struct CCB *ccb;
3226 3225          uint32_t intmask_org;
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3424 3423                      ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
3425 3424                  break;
3426 3425          }
3427 3426  
3428 3427          }
3429 3428  
3430 3429          if ((acb->timeout_id != 0) &&
3431 3430              ((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0)) {
3432 3431                  /* do pkt timeout check each 5 secs */
3433 3432                  acb->timeout_id = timeout(arcmsr_devMap_monitor, (void*)acb,
3434      -                    (ARCMSR_DEV_MAP_WATCH * drv_usectohz(1000000)));
     3433 +                    drv_sectohz(ARCMSR_DEV_MAP_WATCH));
3435 3434          }
3436 3435  }
3437 3436  
3438 3437  
3439 3438  static uint32_t
3440 3439  arcmsr_disable_allintr(struct ACB *acb) {
3441 3440  
3442 3441          uint32_t intmask_org;
3443 3442  
3444 3443          switch (acb->adapter_type) {
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