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--- old/usr/src/uts/intel/io/heci/heci_data_structures.h
+++ new/usr/src/uts/intel/io/heci/heci_data_structures.h
1 1 /*
2 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
3 3 * Use is subject to license terms.
4 4 */
5 5
6 6 /*
7 7 * Part of Intel(R) Manageability Engine Interface Linux driver
8 8 *
9 9 * Copyright (c) 2003 - 2008 Intel Corp.
10 10 * All rights reserved.
11 11 *
12 12 * Redistribution and use in source and binary forms, with or without
13 13 * modification, are permitted provided that the following conditions
14 14 * are met:
15 15 * 1. Redistributions of source code must retain the above copyright
16 16 * notice, this list of conditions, and the following disclaimer,
17 17 * without modification.
18 18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 19 * substantially similar to the "NO WARRANTY" disclaimer below
20 20 * ("Disclaimer") and any redistribution must be conditioned upon
21 21 * including a substantially similar Disclaimer requirement for further
22 22 * binary redistribution.
23 23 * 3. Neither the names of the above-listed copyright holders nor the names
24 24 * of any contributors may be used to endorse or promote products derived
25 25 * from this software without specific prior written permission.
26 26 *
27 27 * Alternatively, this software may be distributed under the terms of the
28 28 * GNU General Public License ("GPL") version 2 as published by the Free
29 29 * Software Foundation.
30 30 *
31 31 * NO WARRANTY
32 32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
35 35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36 36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
40 40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
41 41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 42 * POSSIBILITY OF SUCH DAMAGES.
43 43 *
44 44 */
45 45
46 46 #ifndef _HECI_DATA_STRUCTURES_H_
47 47 #define _HECI_DATA_STRUCTURES_H_
48 48
49 49 #include <sys/varargs.h>
50 50 #include <sys/types.h>
51 51
52 52 #ifndef SUNOS
53 53 #define SUNOS
54 54 #endif
55 55
56 56 /*
57 57 * error code definition
58 58 */
59 59 #define ESLOTS_OVERFLOW 1
60 60 #define ECORRUPTED_MESSAGE_HEADER 1000
61 61 #define ECOMPLETE_MESSAGE 1001
62 62
63 63 #define HECI_FC_MESSAGE_RESERVED_LENGTH 5
64 64
65 65 /*
66 66 * Number of queue lists used by this driver
67 67 */
68 68 #define HECI_IO_LISTS_NUMBER 7
69 69
70 70 /*
71 71 * Maximum transmission unit (MTU) of heci messages
72 72 */
73 73 #define IAMTHIF_MTU 4160
74 74 #pragma pack(1)
75 75
76 76
77 77 /*
78 78 * HECI HW Section
79 79 */
80 80
81 81 /* HECI registers */
82 82 /* H_CB_WW - Host Circular Buffer (CB) Write Window register */
83 83 #define H_CB_WW 0
84 84 /* H_CSR - Host Control Status register */
85 85 #define H_CSR 4
86 86 /* ME_CB_RW - ME Circular Buffer Read Window register (read only) */
87 87 #define ME_CB_RW 8
88 88 /* ME_CSR_HA - ME Control Status Host Access register (read only) */
89 89 #define ME_CSR_HA 0xC
90 90
91 91
92 92 /* register bits of H_CSR (Host Control Status register) */
93 93 /* Host Circular Buffer Depth - maximum number of 32-bit entries in CB */
94 94 #define H_CBD 0xFF000000
95 95 /* Host Circular Buffer Write Pointer */
96 96 #define H_CBWP 0x00FF0000
97 97 /* Host Circular Buffer Read Pointer */
98 98 #define H_CBRP 0x0000FF00
99 99 /* Host Reset */
100 100 #define H_RST 0x00000010
101 101 /* Host Ready */
102 102 #define H_RDY 0x00000008
103 103 /* Host Interrupt Generate */
104 104 #define H_IG 0x00000004
105 105 /* Host Interrupt Status */
106 106 #define H_IS 0x00000002
107 107 /* Host Interrupt Enable */
108 108 #define H_IE 0x00000001
109 109
110 110
111 111 /*
112 112 * register bits of ME_CSR_HA (ME Control Status Host Access register)
113 113 * ME CB (Circular Buffer) Depth HRA (Host Read Access)
114 114 * - host read only access to ME_CBD
115 115 */
116 116 #define ME_CBD_HRA 0xFF000000
117 117 /* ME CB Write Pointer HRA - host read only access to ME_CBWP */
118 118 #define ME_CBWP_HRA 0x00FF0000
119 119 /* ME CB Read Pointer HRA - host read only access to ME_CBRP */
120 120 #define ME_CBRP_HRA 0x0000FF00
121 121 /* ME Reset HRA - host read only access to ME_RST */
122 122 #define ME_RST_HRA 0x00000010
123 123 /* ME Ready HRA - host read only access to ME_RDY */
124 124 #define ME_RDY_HRA 0x00000008
125 125 /* ME Interrupt Generate HRA - host read only access to ME_IG */
126 126 #define ME_IG_HRA 0x00000004
127 127 /* ME Interrupt Status HRA - host read only access to ME_IS */
128 128 #define ME_IS_HRA 0x00000002
129 129 /* ME Interrupt Enable HRA - host read only access to ME_IE */
130 130 #define ME_IE_HRA 0x00000001
131 131
132 132 #define HECI_MINOR_NUMBER 1
133 133 /* #define HECI_PTHI_MINOR_NUMBER 0 */
134 134 #define MAKE_MINOR_NUM(minor, instance) (((uint_t)(minor) << 8) \
135 135 | ((instance) & 0xFF))
136 136 #define HECI_MINOR_TO_INSTANCE(x) ((x) & 0xFF)
137 137 #define HECI_MINOR_TO_IFNUM(x) (((x) >> 8) & 0xFF)
138 138
139 139 #define HECI_MAX_OPEN_HANDLE_COUNT 253
140 140
141 141 /*
142 142 * debug kernel print macro define
143 143 */
144 144 #define PRN(...) _PRN("%s(): "__VA_ARGS__, "")
145 145 #define _PRN(format, ...) \
146 146 cmn_err(CE_CONT, format"%s", __func__, __VA_ARGS__)
147 147
148 148 #ifdef DEBUG
149 149 extern int heci_debug;
150 150 #define DBG(...) { if (heci_debug) PRN(__VA_ARGS__); }
151 151 #else
152 152 #define DBG
153 153 #endif
154 154
155 155 #define assert(expr) \
156 156 if (!(expr)) { \
157 157 cmn_err(CE_WARN, "Assertion failed! %s,%s,line=%d", #expr, \
158 158 __FILE__, __LINE__); \
159 159 }
160 160
161 161 #define list_next(p) ((p)->list_next)
162 162
163 163 #define walk_list(p, n, h) \
164 164 for (p = list_next(h), n = list_next(p); \
165 165 p != (h); \
166 166 p = n, n = list_next(p))
167 167
168 168
169 169 #define list_init(ptr) { \
170 170 (ptr)->list_next = (ptr); (ptr)->list_prev = (ptr); \
171 171 }
172 172
173 173 #define LIST_INIT_HEAD list_init
174 174 #define list_del_init(n) { \
175 175 list_del(n); \
176 176 list_init(n); \
177 177 }
178 178
179 179 #define list_empty(l) ((l)->list_next == (l))
180 180 #define list_del(p) { (p)->list_next->list_prev = (p)->list_prev; \
181 181 (p)->list_prev->list_next = (p)->list_next; }
182 182 #define list_add_tail(newnode, head) { \
183 183 (head)->list_prev->list_next = (newnode); \
184 184 (newnode)->list_prev = (head)->list_prev; \
185 185 (head)->list_prev = (newnode); \
186 186 (newnode)->list_next = (head); \
187 187 }
188 188 #define list_relink_node(newnode, head) { \
189 189 list_del(newnode); \
190 190 list_add_tail(newnode, head); \
191 191 }
192 192
193 193 #ifdef __GNUC__
194 194
195 195 #define find_struct(ptr, type, member) ( \
196 196 { \
197 197 const __typeof(((type *)0)->member) *__tmpp = (ptr); \
198 198 (type *)(void *)((char *)__tmpp - ((size_t)&((type *)0)->member)); \
199 199 })
200 200 #else
201 201 /* type unsafe version */
202 202 #define find_struct(ptr, type, member) \
203 203 ((type *)(void *)((char *)(ptr) \
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204 204 - ((size_t)&((type *)0)->member)))
205 205
206 206 #endif
207 207
208 208 #define list_for_each_entry_safe(pos, n, head, member, type) \
209 209 for (pos = find_struct((head)->list_next, type, member), \
210 210 n = find_struct(pos->member.list_next, type, member); \
211 211 &pos->member != (head); \
212 212 pos = n, n = find_struct(n->member.list_next, type, member))
213 213
214 -#define HZ drv_usectohz(1000000)
214 +#define HZ drv_sectohz(1)
215 215 /*
216 216 * time to wait HECI become ready after init
217 217 */
218 218 #define HECI_INTEROP_TIMEOUT (HZ * 7)
219 219
220 220 /*
221 221 * watch dog definition
222 222 */
223 223 #define HECI_WATCHDOG_DATA_SIZE 16
224 224 #define HECI_START_WD_DATA_SIZE 20
225 225 #define HECI_WD_PARAMS_SIZE 4
226 226 #define HECI_WD_STATE_INDEPENDENCE_MSG_SENT (1 << 0)
227 227
228 228 #define HECI_WD_HOST_CLIENT_ID 1
229 229 #define HECI_IAMTHIF_HOST_CLIENT_ID 2
230 230
231 231 struct guid {
232 232 uint32_t data1;
233 233 uint16_t data2;
234 234 uint16_t data3;
235 235 uint8_t data4[8];
236 236 };
237 237
238 238 /* File state */
239 239 enum file_state {
240 240 HECI_FILE_INITIALIZING = 0,
241 241 HECI_FILE_CONNECTING,
242 242 HECI_FILE_CONNECTED,
243 243 HECI_FILE_DISCONNECTING,
244 244 HECI_FILE_DISCONNECTED
245 245 };
246 246
247 247 /* HECI device states */
248 248 enum heci_states {
249 249 HECI_INITIALIZING = 0,
250 250 HECI_ENABLED,
251 251 HECI_RESETING,
252 252 HECI_DISABLED,
253 253 HECI_RECOVERING_FROM_RESET,
254 254 HECI_POWER_DOWN,
255 255 HECI_POWER_UP
256 256 };
257 257
258 258 enum iamthif_states {
259 259 HECI_IAMTHIF_IDLE,
260 260 HECI_IAMTHIF_WRITING,
261 261 HECI_IAMTHIF_FLOW_CONTROL,
262 262 HECI_IAMTHIF_READING,
263 263 HECI_IAMTHIF_READ_COMPLETE
264 264 };
265 265
266 266 enum heci_file_transaction_states {
267 267 HECI_IDLE,
268 268 HECI_WRITING,
269 269 HECI_WRITE_COMPLETE,
270 270 HECI_FLOW_CONTROL,
271 271 HECI_READING,
272 272 HECI_READ_COMPLETE
273 273 };
274 274
275 275 /* HECI CB */
276 276 enum heci_cb_major_types {
277 277 HECI_READ = 0,
278 278 HECI_WRITE,
279 279 HECI_IOCTL,
280 280 HECI_OPEN,
281 281 HECI_CLOSE
282 282 };
283 283
284 284 /* HECI user data struct */
285 285 struct heci_message_data {
286 286 uint32_t size;
287 287 char *data;
288 288 #ifndef _LP64
289 289 char *pad;
290 290 #endif
291 291 };
292 292
293 293 #define HECI_CONNECT_TIMEOUT 3 /* at least 2 seconds */
294 294
295 295 #define IAMTHIF_STALL_TIMER 12 /* seconds */
296 296 #define IAMTHIF_READ_TIMER 15 /* seconds */
297 297 struct heci_file {
298 298 void * private_data;
299 299 };
300 300
301 301 struct heci_cb_private {
302 302 struct list_node cb_list;
303 303 enum heci_cb_major_types major_file_operations;
304 304 void *file_private;
305 305 struct heci_message_data request_buffer;
306 306 struct heci_message_data response_buffer;
307 307 unsigned long information;
308 308 unsigned long read_time;
309 309 struct heci_file *file_object;
310 310 };
311 311
312 312
313 313 struct io_heci_list {
314 314 struct heci_cb_private heci_cb;
315 315 int status;
316 316 struct iamt_heci_device *device_extension;
317 317 };
318 318
319 319 struct heci_driver_version {
320 320 uint8_t major;
321 321 uint8_t minor;
322 322 uint8_t hotfix;
323 323 uint16_t build;
324 324 };
325 325
326 326 struct heci_client {
327 327 uint32_t max_message_length;
328 328 uint8_t protocol_version;
329 329 };
330 330
331 331 /*
332 332 * HECI BUS Interface Section
333 333 */
334 334 struct heci_msg_hdr {
335 335 uint32_t me_addr:8;
336 336 uint32_t host_addr:8;
337 337 uint32_t length:9;
338 338 uint32_t reserved:6;
339 339 uint32_t msg_complete:1;
340 340 };
341 341
342 342
343 343 struct hbm_cmd {
344 344 uint8_t cmd:7;
345 345 uint8_t is_response:1;
346 346 };
347 347
348 348
349 349 struct heci_bus_message {
350 350 struct hbm_cmd cmd;
351 351 uint8_t command_specific_data[];
352 352 };
353 353
354 354 struct hbm_version {
355 355 uint8_t minor_version;
356 356 uint8_t major_version;
357 357 };
358 358
359 359 struct hbm_host_version_request {
360 360 struct hbm_cmd cmd;
361 361 uint8_t reserved;
362 362 struct hbm_version host_version;
363 363 };
364 364
365 365 struct hbm_host_version_response {
366 366 struct hbm_cmd cmd;
367 367 int host_version_supported;
368 368 struct hbm_version me_max_version;
369 369 };
370 370
371 371 struct hbm_host_stop_request {
372 372 struct hbm_cmd cmd;
373 373 uint8_t reason;
374 374 uint8_t reserved[2];
375 375 };
376 376
377 377 struct hbm_host_stop_response {
378 378 struct hbm_cmd cmd;
379 379 uint8_t reserved[3];
380 380 };
381 381
382 382 struct hbm_me_stop_request {
383 383 struct hbm_cmd cmd;
384 384 uint8_t reason;
385 385 uint8_t reserved[2];
386 386 };
387 387
388 388 struct hbm_host_enum_request {
389 389 struct hbm_cmd cmd;
390 390 uint8_t reserved[3];
391 391 };
392 392
393 393 struct hbm_host_enum_response {
394 394 struct hbm_cmd cmd;
395 395 uint8_t reserved[3];
396 396 uint8_t valid_addresses[32];
397 397 };
398 398
399 399 struct heci_client_properties {
400 400 struct guid protocol_name;
401 401 uint8_t protocol_version;
402 402 uint8_t max_number_of_connections;
403 403 uint8_t fixed_address;
404 404 uint8_t single_recv_buf;
405 405 uint32_t max_msg_length;
406 406 };
407 407
408 408 struct hbm_props_request {
409 409 struct hbm_cmd cmd;
410 410 uint8_t address;
411 411 uint8_t reserved[2];
412 412 };
413 413
414 414
415 415 struct hbm_props_response {
416 416 struct hbm_cmd cmd;
417 417 uint8_t address;
418 418 uint8_t status;
419 419 uint8_t reserved[1];
420 420 struct heci_client_properties client_properties;
421 421 };
422 422
423 423 struct hbm_client_connect_request {
424 424 struct hbm_cmd cmd;
425 425 uint8_t me_addr;
426 426 uint8_t host_addr;
427 427 uint8_t reserved;
428 428 };
429 429
430 430 struct hbm_client_connect_response {
431 431 struct hbm_cmd cmd;
432 432 uint8_t me_addr;
433 433 uint8_t host_addr;
434 434 uint8_t status;
435 435 };
436 436
437 437 struct hbm_client_disconnect_request {
438 438 struct hbm_cmd cmd;
439 439 uint8_t me_addr;
440 440 uint8_t host_addr;
441 441 uint8_t reserved[1];
442 442 };
443 443
444 444 struct hbm_flow_control {
445 445 struct hbm_cmd cmd;
446 446 uint8_t me_addr;
447 447 uint8_t host_addr;
448 448 uint8_t reserved[HECI_FC_MESSAGE_RESERVED_LENGTH];
449 449 };
450 450
451 451 struct heci_me_client {
452 452 struct heci_client_properties props;
453 453 uint8_t client_id;
454 454 uint8_t flow_ctrl_creds;
455 455 };
456 456
457 457 #pragma pack()
458 458 /* Private file struct */
459 459 struct heci_file_private {
460 460 struct list_node link;
461 461 struct heci_file *file;
462 462 enum file_state state;
463 463 struct pollhead tx_pollwait;
464 464 kcondvar_t rx_wait;
465 465 struct pollhead pollwait;
466 466 kmutex_t file_lock;
467 467 kmutex_t read_io_lock;
468 468 kmutex_t write_io_lock;
469 469 int read_pending;
470 470 int status;
471 471 /* ID of client connected */
472 472 uint8_t host_client_id;
473 473 uint8_t me_client_id;
474 474 uint8_t flow_ctrl_creds;
475 475 uint8_t timer_count;
476 476 enum heci_file_transaction_states reading_state;
477 477 enum heci_file_transaction_states writing_state;
478 478 int sm_state;
479 479 struct heci_cb_private *read_cb;
480 480 };
481 481
482 482 /* private device struct */
483 483 struct iamt_heci_device {
484 484 dev_info_t *dip;
485 485 ddi_acc_handle_t io_handle;
486 486 ddi_iblock_cookie_t sc_iblk;
487 487
488 488 /*
489 489 * lists of queues
490 490 */
491 491
492 492 /* array of pointers to aio lists */
493 493 struct io_heci_list *io_list_array[HECI_IO_LISTS_NUMBER];
494 494 struct io_heci_list read_list; /* driver read queue */
495 495 struct io_heci_list write_list; /* driver write queue */
496 496 struct io_heci_list write_waiting_list; /* write waiting queue */
497 497 struct io_heci_list ctrl_wr_list; /* managed write IOCTL list */
498 498 struct io_heci_list ctrl_rd_list; /* managed read IOCTL list */
499 499 struct io_heci_list pthi_cmd_list; /* PTHI list for cmd waiting */
500 500
501 501 /* driver managed PTHI list for reading completed pthi cmd data */
502 502 struct io_heci_list pthi_read_complete_list;
503 503 /*
504 504 * list of files
505 505 */
506 506 struct list_node file_list;
507 507 /*
508 508 * memory of device
509 509 */
510 510 char *mem_addr;
511 511 /*
512 512 * lock for the device
513 513 */
514 514 kmutex_t device_lock;
515 515 ddi_taskq_t *work;
516 516 int recvd_msg;
517 517
518 518 ddi_taskq_t *reinit_tsk;
519 519 timeout_id_t wd_timer;
520 520 /*
521 521 * hw states of host and fw(ME)
522 522 */
523 523 uint32_t host_hw_state;
524 524 uint32_t me_hw_state;
525 525 /*
526 526 * waiting queue for receive message from FW
527 527 */
528 528 kcondvar_t wait_recvd_msg;
529 529 kcondvar_t wait_stop_wd;
530 530 /*
531 531 * heci device states
532 532 */
533 533 enum heci_states heci_state;
534 534 int stop;
535 535
536 536 uint32_t extra_write_index;
537 537 uint32_t rd_msg_buf[128]; /* used for control messages */
538 538 uint32_t wr_msg_buf[128]; /* used for control messages */
539 539 uint32_t ext_msg_buf[8]; /* for control responses */
540 540 uint32_t rd_msg_hdr;
541 541
542 542 struct hbm_version version;
543 543
544 544 int host_buffer_is_empty;
545 545 struct heci_file_private wd_file_ext;
546 546 struct heci_me_client *me_clients; /* Note: need to be allocated */
547 547 uint8_t heci_me_clients[32]; /* list of existing clients */
548 548 uint8_t num_heci_me_clients;
549 549 uint8_t heci_host_clients[32]; /* list of existing clients */
550 550 uint8_t current_host_client_id;
551 551
552 552 int wd_pending;
553 553 int wd_stoped;
554 554 uint16_t wd_timeout; /* seconds ((wd_data[1] << 8) + wd_data[0]) */
555 555 unsigned char wd_data[HECI_START_WD_DATA_SIZE];
556 556
557 557
558 558 uint16_t wd_due_counter;
559 559 int asf_mode;
560 560 int wd_bypass; /* if 1, don't refresh watchdog ME client */
561 561
562 562 struct heci_file *iamthif_file_object;
563 563 struct heci_file_private iamthif_file_ext;
564 564 int iamthif_ioctl;
565 565 int iamthif_canceled;
566 566 uint32_t iamthif_timer;
567 567 uint32_t iamthif_stall_timer;
568 568 struct heci_file files[256]; /* a file handle for each client */
569 569 unsigned char iamthif_msg_buf[IAMTHIF_MTU];
570 570 uint32_t iamthif_msg_buf_size;
571 571 uint32_t iamthif_msg_buf_index;
572 572 int iamthif_flow_control_pending;
573 573 enum iamthif_states iamthif_state;
574 574
575 575 struct heci_cb_private *iamthif_current_cb;
576 576 uint8_t write_hang;
577 577 int need_reset;
578 578 long open_handle_count;
579 579
580 580 };
581 581
582 582 /*
583 583 * read_heci_register - Read a byte from the heci device
584 584 *
585 585 * @device: the device structure
586 586 * @offset: offset from which to read the data
587 587 *
588 588 * @return the byte read.
589 589 */
590 590 uint32_t read_heci_register(struct iamt_heci_device *device,
591 591 unsigned long offset);
592 592
593 593 /*
594 594 * write_heci_register - Write 4 bytes to the heci device
595 595 *
596 596 * @device: the device structure
597 597 * @offset: offset from which to write the data
598 598 * @value: the byte to write
599 599 */
600 600 void write_heci_register(struct iamt_heci_device *device, unsigned long offset,
601 601 uint32_t value);
602 602
603 603 #define UIO_OFFSET(p) (((struct uio *)p)->uio_offset)
604 604 #define UIO_LENGTH(p) (((struct uio *)p)->uio_resid)
605 605 #define UIO_BUFF(p) ((char *)((struct uio *)p)->uio_iov->iov_base)
606 606
607 607 #endif /* _HECI_DATA_STRUCTURES_H_ */
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