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5255 uts shouldn't open-code ISP2
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--- old/usr/src/uts/common/io/ib/adapters/hermon/hermon_cfg.c
+++ new/usr/src/uts/common/io/ib/adapters/hermon/hermon_cfg.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
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24 24 */
25 25
26 26 /*
27 27 * hermon_cfg.c
28 28 * Hermon Configuration Profile Routines
29 29 *
30 30 * Implements the routines necessary for initializing and (later) tearing
31 31 * down the list of Hermon configuration information.
32 32 */
33 33
34 +#include <sys/sysmacros.h>
34 35 #include <sys/types.h>
35 36 #include <sys/conf.h>
36 37 #include <sys/ddi.h>
37 38 #include <sys/sunddi.h>
38 39 #include <sys/modctl.h>
39 40 #include <sys/bitmap.h>
40 41
41 42 #include <sys/ib/adapters/hermon/hermon.h>
42 43
43 44 /*
44 45 * Below are the elements that make up the Hermon configuration profile.
45 46 * For advanced users who wish to alter these values, this can be done via
46 47 * the /etc/system file. By default, values are assigned to the number of
47 48 * supported resources, either from the HCA's reported capacities or by
48 49 * a by-design limit in the driver.
49 50 */
50 51
51 52 /* Number of supported QPs, CQs and SRQs */
52 53 uint32_t hermon_log_num_qp = HERMON_NUM_QP_SHIFT;
53 54 uint32_t hermon_log_num_cq = HERMON_NUM_CQ_SHIFT;
54 55 uint32_t hermon_log_num_srq = HERMON_NUM_SRQ_SHIFT;
55 56
56 57 /* Number of supported SGL per WQE for SQ/RQ, and for SRQ */
57 58 /* XXX use the same for all queues if limitation in srq.h is resolved */
58 59 uint32_t hermon_wqe_max_sgl = HERMON_NUM_SGL_PER_WQE;
59 60 uint32_t hermon_srq_max_sgl = HERMON_SRQ_MAX_SGL;
60 61
61 62 /* Maximum "responder resources" (in) and "initiator depth" (out) per QP */
62 63 uint32_t hermon_log_num_rdb_per_qp = HERMON_LOG_NUM_RDB_PER_QP;
63 64
64 65 /*
65 66 * Number of multicast groups (MCGs), number of QP per MCG, and the number
66 67 * of entries (from the total number) in the multicast group "hash table"
67 68 */
68 69 uint32_t hermon_log_num_mcg = HERMON_NUM_MCG_SHIFT;
69 70 uint32_t hermon_num_qp_per_mcg = HERMON_NUM_QP_PER_MCG;
70 71 uint32_t hermon_log_num_mcg_hash = HERMON_NUM_MCG_HASH_SHIFT;
71 72
72 73 /* Number of UD AVs */
73 74 uint32_t hermon_log_num_ah = HERMON_NUM_AH_SHIFT;
74 75
75 76 /* Number of EQs and their default size */
76 77 uint32_t hermon_log_num_eq = HERMON_NUM_EQ_SHIFT;
77 78 uint32_t hermon_log_eq_sz = HERMON_DEFAULT_EQ_SZ_SHIFT;
78 79
79 80 /*
80 81 * Number of supported MPTs, MTTs and also the maximum MPT size.
81 82 */
82 83 uint32_t hermon_log_num_mtt = HERMON_NUM_MTT_SHIFT;
83 84 uint32_t hermon_log_num_dmpt = HERMON_NUM_DMPT_SHIFT;
84 85 uint32_t hermon_log_max_mrw_sz = HERMON_MAX_MEM_MPT_SHIFT;
85 86
86 87 /*
87 88 * Number of supported UAR (User Access Regions) for this HCA.
88 89 * We could in the future read in uar_sz from devlim, and thus
89 90 * derive the number of UAR. Since this is derived from PAGESIZE,
90 91 * however, this means that x86 systems would have twice as many
91 92 * UARs as SPARC systems. Therefore for consistency's sake, we will
92 93 * just use 1024 pages, which is the maximum on SPARC systems.
93 94 */
94 95 uint32_t hermon_log_num_uar = HERMON_NUM_UAR_SHIFT;
95 96
96 97 /*
97 98 * Number of remaps allowed for FMR before a sync is required. This value
98 99 * determines how many times we can fmr_deregister() before the underlying fmr
99 100 * framework places the region to wait for an MTT_SYNC operation, cleaning up
100 101 * the old mappings.
101 102 */
102 103 uint32_t hermon_fmr_num_remaps = HERMON_FMR_MAX_REMAPS;
103 104
104 105 /*
105 106 * Number of supported Hermon mailboxes ("In" and "Out") and their maximum
106 107 * sizes, respectively
107 108 */
108 109 uint32_t hermon_log_num_inmbox = HERMON_NUM_MAILBOXES_SHIFT;
109 110 uint32_t hermon_log_num_outmbox = HERMON_NUM_MAILBOXES_SHIFT;
110 111 uint32_t hermon_log_inmbox_size = HERMON_MBOX_SIZE_SHIFT;
111 112 uint32_t hermon_log_outmbox_size = HERMON_MBOX_SIZE_SHIFT;
112 113 uint32_t hermon_log_num_intr_inmbox = HERMON_NUM_INTR_MAILBOXES_SHIFT;
113 114 uint32_t hermon_log_num_intr_outmbox = HERMON_NUM_INTR_MAILBOXES_SHIFT;
114 115
115 116 /* Number of supported Protection Domains (PD) */
116 117 uint32_t hermon_log_num_pd = HERMON_NUM_PD_SHIFT;
117 118
118 119 /*
119 120 * Number of total supported PKeys per PKey table (i.e.
120 121 * per port). Also the number of SGID per GID table.
121 122 */
122 123 uint32_t hermon_log_max_pkeytbl = HERMON_NUM_PKEYTBL_SHIFT;
123 124 uint32_t hermon_log_max_gidtbl = HERMON_NUM_GIDTBL_SHIFT;
124 125
125 126 /* Maximum supported MTU and portwidth */
126 127 uint32_t hermon_max_mtu = HERMON_MAX_MTU;
127 128 uint32_t hermon_max_port_width = HERMON_MAX_PORT_WIDTH;
128 129
129 130 /* Number of supported Virtual Lanes (VL) */
130 131 uint32_t hermon_max_vlcap = HERMON_MAX_VLCAP;
131 132
132 133 /*
133 134 * Whether or not to use the built-in (i.e. in firmware) agents for QP0 and
134 135 * QP1, respectively.
135 136 */
136 137 uint32_t hermon_qp0_agents_in_fw = 0;
137 138 uint32_t hermon_qp1_agents_in_fw = 0;
138 139
139 140 /*
140 141 * Whether DMA mappings should bypass the PCI IOMMU or not.
141 142 * hermon_iommu_bypass is a global setting for all memory addresses.
142 143 */
143 144 uint32_t hermon_iommu_bypass = 1;
144 145
145 146 /*
146 147 * Whether *DATA* buffers should be bound w/ Relaxed Ordering (RO) turned on
147 148 * via the SW workaround (HCAs don't support RO in HW). Defaulted on,
148 149 * though care must be taken w/ some Userland clients that *MAY* have
149 150 * peeked in the data to understand when data xfer was done - MPI does
150 151 * as an efficiency
151 152 */
152 153
153 154 uint32_t hermon_kernel_data_ro = HERMON_RO_ENABLED; /* default */
154 155 uint32_t hermon_user_data_ro = HERMON_RO_ENABLED; /* default */
155 156
156 157 /*
157 158 * Whether Hermon should use MSI (Message Signaled Interrupts), if available.
158 159 * Note: 0 indicates 'legacy interrupt', 1 indicates MSI (if available)
159 160 */
160 161 uint32_t hermon_use_msi_if_avail = 1;
161 162
162 163 /*
163 164 * This is a patchable variable that determines the time we will wait after
164 165 * initiating SW reset before we do our first read from Hermon config space.
165 166 * If this value is set too small (less than the default 100ms), it is
166 167 * possible for Hermon hardware to be unready to respond to the config cycle
167 168 * reads. This could cause master abort on the PCI bridge. Note: If
168 169 * "hermon_sw_reset_delay" is set to zero, then no software reset of the Hermon
169 170 * device will be attempted.
170 171 */
171 172 uint32_t hermon_sw_reset_delay = HERMON_SW_RESET_DELAY;
172 173
173 174 /*
174 175 * These are patchable variables for hermon command polling. The poll_delay is
175 176 * the number of usec to wait in-between calls to poll the 'go' bit. The
176 177 * poll_max is the total number of usec to loop in waiting for the 'go' bit to
177 178 * clear.
178 179 */
179 180 uint32_t hermon_cmd_poll_delay = HERMON_CMD_POLL_DELAY;
180 181 uint32_t hermon_cmd_poll_max = HERMON_CMD_POLL_MAX;
181 182
182 183 /*
183 184 * This is a patchable variable that determines the frequency with which
184 185 * the AckReq bit will be set in outgoing RC packets. The AckReq bit will be
185 186 * set in at least every 2^hermon_qp_ackreq_freq packets (but at least once
186 187 * per message, i.e. in the last packet). Tuning this value can increase
187 188 * IB fabric utilization by cutting down on the number of unnecessary ACKs.
188 189 */
189 190 uint32_t hermon_qp_ackreq_freq = HERMON_QP_ACKREQ_FREQ;
190 191
191 192 static void hermon_cfg_wqe_sizes(hermon_state_t *state,
192 193 hermon_cfg_profile_t *cp);
193 194 #ifdef __sparc
194 195 static void hermon_check_iommu_bypass(hermon_state_t *state,
195 196 hermon_cfg_profile_t *cp);
196 197 #endif
197 198
198 199 /*
199 200 * hermon_cfg_profile_init_phase1()
200 201 * Context: Only called from attach() path context
201 202 */
202 203 int
203 204 hermon_cfg_profile_init_phase1(hermon_state_t *state)
204 205 {
205 206 hermon_cfg_profile_t *cp;
206 207
207 208 /*
208 209 * Allocate space for the configuration profile structure
209 210 */
210 211 cp = (hermon_cfg_profile_t *)kmem_zalloc(sizeof (hermon_cfg_profile_t),
211 212 KM_SLEEP);
212 213
213 214 /*
214 215 * Common to all profiles.
215 216 */
216 217 cp->cp_qp0_agents_in_fw = hermon_qp0_agents_in_fw;
217 218 cp->cp_qp1_agents_in_fw = hermon_qp1_agents_in_fw;
218 219 cp->cp_sw_reset_delay = hermon_sw_reset_delay;
219 220 cp->cp_cmd_poll_delay = hermon_cmd_poll_delay;
220 221 cp->cp_cmd_poll_max = hermon_cmd_poll_max;
221 222 cp->cp_ackreq_freq = hermon_qp_ackreq_freq;
222 223 cp->cp_fmr_max_remaps = hermon_fmr_num_remaps;
223 224
224 225 /*
225 226 * Although most of the configuration is enabled in "phase2" of the
226 227 * cfg_profile_init, we have to setup the OUT mailboxes soon, since
227 228 * they are used immediately after this "phase1" completes, to run the
228 229 * firmware and get the device limits, which we'll need for 'phase2'.
229 230 * That's done in rsrc_init_phase1, called shortly after we do this
230 231 * and the sw reset - see hermon.c
231 232 */
232 233 if (state->hs_cfg_profile_setting == HERMON_CFG_MEMFREE) {
233 234 cp->cp_log_num_outmbox = hermon_log_num_outmbox;
234 235 cp->cp_log_outmbox_size = hermon_log_outmbox_size;
235 236 cp->cp_log_num_inmbox = hermon_log_num_inmbox;
236 237 cp->cp_log_inmbox_size = hermon_log_inmbox_size;
237 238 cp->cp_log_num_intr_inmbox = hermon_log_num_intr_inmbox;
238 239 cp->cp_log_num_intr_outmbox = hermon_log_num_intr_outmbox;
239 240
240 241 } else {
241 242 return (DDI_FAILURE);
242 243 }
243 244
244 245 /*
245 246 * Set IOMMU bypass or not. Ensure consistency of flags with
246 247 * architecture type.
247 248 */
248 249 #ifdef __sparc
249 250 if (hermon_iommu_bypass == 1) {
250 251 hermon_check_iommu_bypass(state, cp);
251 252 } else {
252 253 cp->cp_iommu_bypass = HERMON_BINDMEM_NORMAL;
253 254 }
254 255 #else
255 256 cp->cp_iommu_bypass = HERMON_BINDMEM_NORMAL;
256 257 #endif
257 258
258 259 /* Attach the configuration profile to Hermon softstate */
259 260 state->hs_cfg_profile = cp;
260 261
261 262 return (DDI_SUCCESS);
262 263 }
263 264
264 265 /*
265 266 * hermon_cfg_profile_init_phase2()
266 267 * Context: Only called from attach() path context
267 268 */
268 269 int
269 270 hermon_cfg_profile_init_phase2(hermon_state_t *state)
270 271 {
271 272 hermon_cfg_profile_t *cp;
272 273 hermon_hw_querydevlim_t *devlim;
273 274 hermon_hw_query_port_t *port;
274 275 uint32_t num, size;
275 276 int i;
276 277
277 278 /* Read in the device limits */
278 279 devlim = &state->hs_devlim;
279 280 /* and the port information */
280 281 port = &state->hs_queryport;
281 282
282 283 /* Read the configuration profile */
283 284 cp = state->hs_cfg_profile;
284 285
285 286 /*
286 287 * We configure all Hermon HCAs with the same profile, which
287 288 * is based upon the default value assignments above. If we want to
288 289 * add additional profiles in the future, they can be added here.
289 290 * Note the reference to "Memfree" is a holdover from Arbel/Sinai
290 291 */
291 292 if (state->hs_cfg_profile_setting != HERMON_CFG_MEMFREE) {
292 293 return (DDI_FAILURE);
293 294 }
294 295
295 296 /*
296 297 * Note for most configuration parameters, we use the lesser of our
297 298 * desired configuration value or the device-defined maximum value.
298 299 */
299 300 cp->cp_log_num_mtt = min(hermon_log_num_mtt, devlim->log_max_mtt);
300 301 cp->cp_log_num_dmpt = min(hermon_log_num_dmpt, devlim->log_max_dmpt);
301 302 cp->cp_log_num_cmpt = HERMON_LOG_CMPT_PER_TYPE + 2; /* times 4, */
302 303 /* per PRM */
303 304 cp->cp_log_max_mrw_sz = min(hermon_log_max_mrw_sz,
304 305 devlim->log_max_mrw_sz);
305 306 cp->cp_log_num_pd = min(hermon_log_num_pd, devlim->log_max_pd);
306 307 cp->cp_log_num_qp = min(hermon_log_num_qp, devlim->log_max_qp);
307 308 cp->cp_log_num_cq = min(hermon_log_num_cq, devlim->log_max_cq);
308 309 cp->cp_log_num_srq = min(hermon_log_num_srq, devlim->log_max_srq);
309 310 cp->cp_log_num_eq = min(hermon_log_num_eq, devlim->log_max_eq);
310 311 cp->cp_log_eq_sz = min(hermon_log_eq_sz, devlim->log_max_eq_sz);
311 312 cp->cp_log_num_rdb = cp->cp_log_num_qp +
312 313 min(hermon_log_num_rdb_per_qp, devlim->log_max_ra_req_qp);
313 314 cp->cp_hca_max_rdma_in_qp = cp->cp_hca_max_rdma_out_qp =
314 315 1 << min(hermon_log_num_rdb_per_qp, devlim->log_max_ra_req_qp);
315 316 cp->cp_num_qp_per_mcg = max(hermon_num_qp_per_mcg,
316 317 HERMON_NUM_QP_PER_MCG_MIN);
317 318 cp->cp_num_qp_per_mcg = min(cp->cp_num_qp_per_mcg,
318 319 (1 << devlim->log_max_qp_mcg) - 8);
319 320 cp->cp_num_qp_per_mcg = (1 << highbit(cp->cp_num_qp_per_mcg + 7)) - 8;
320 321 cp->cp_log_num_mcg = min(hermon_log_num_mcg, devlim->log_max_mcg);
321 322 cp->cp_log_num_mcg_hash = hermon_log_num_mcg_hash;
322 323
323 324 /* until srq_resize is debugged, disable it */
324 325 cp->cp_srq_resize_enabled = 0;
325 326
326 327 /* cp->cp_log_num_uar = hermon_log_num_uar; */
327 328 /*
328 329 * now, we HAVE to calculate the number of UAR pages, so that we can
329 330 * get the blueflame stuff correct as well
330 331 */
331 332
332 333 size = devlim->log_max_uar_sz;
333 334 /* 1MB (2^^20) times size (2^^size) / sparc_pg (2^^13) */
334 335 num = (20 + size) - 13; /* XXX - consider using PAGESHIFT */
335 336 if (devlim->blu_flm)
336 337 num -= 1; /* if blueflame, only half the size for UARs */
337 338 cp->cp_log_num_uar = min(hermon_log_num_uar, num);
338 339
339 340
340 341 /* while we're at it, calculate the index of the kernel uar page */
341 342 /* either the reserved uar's or 128, whichever is smaller */
342 343 state->hs_kernel_uar_index = (devlim->num_rsvd_uar > 128) ?
343 344 devlim->num_rsvd_uar : 128;
344 345
345 346 cp->cp_log_max_pkeytbl = port->log_max_pkey;
346 347
347 348 cp->cp_log_max_qp_sz = devlim->log_max_qp_sz;
348 349 cp->cp_log_max_cq_sz = devlim->log_max_cq_sz;
349 350 cp->cp_log_max_srq_sz = devlim->log_max_srq_sz;
350 351 cp->cp_log_max_gidtbl = port->log_max_gid;
351 352 cp->cp_max_mtu = port->ib_mtu; /* XXX now from query_port */
352 353 cp->cp_max_port_width = port->ib_port_wid; /* now from query_port */
353 354 cp->cp_max_vlcap = port->max_vl;
354 355 cp->cp_log_num_ah = hermon_log_num_ah;
355 356
356 357 /* Paranoia, ensure no arrays indexed by port_num are out of bounds */
357 358 cp->cp_num_ports = devlim->num_ports;
358 359 if (cp->cp_num_ports > HERMON_MAX_PORTS) {
359 360 cmn_err(CE_CONT, "device has more ports (%d) than are "
360 361 "supported; Using %d ports\n",
361 362 cp->cp_num_ports, HERMON_MAX_PORTS);
362 363 cp->cp_num_ports = HERMON_MAX_PORTS;
363 364 };
364 365
365 366 /* allocate variable sized arrays */
366 367 for (i = 0; i < HERMON_MAX_PORTS; i++) {
367 368 state->hs_pkey[i] = kmem_zalloc((1 << cp->cp_log_max_pkeytbl) *
368 369 sizeof (ib_pkey_t), KM_SLEEP);
369 370 state->hs_guid[i] = kmem_zalloc((1 << cp->cp_log_max_gidtbl) *
370 371 sizeof (ib_guid_t), KM_SLEEP);
371 372 }
372 373
373 374 /* Determine WQE sizes from requested max SGLs */
374 375 hermon_cfg_wqe_sizes(state, cp);
375 376
376 377 /* Set whether to use MSIs or not */
377 378 cp->cp_use_msi_if_avail = hermon_use_msi_if_avail;
378 379
379 380 #if !defined(_ELF64)
380 381 /*
381 382 * Need to reduce the hermon kernel virtual memory footprint
382 383 * on 32-bit kernels.
383 384 */
384 385 cp->cp_log_num_mtt -= 6;
385 386 cp->cp_log_num_dmpt -= 6;
386 387 cp->cp_log_num_pd -= 6;
387 388 cp->cp_log_num_qp -= 6;
388 389 cp->cp_log_num_cq -= 6;
389 390 cp->cp_log_num_srq -= 6;
390 391 cp->cp_log_num_rdb = cp->cp_log_num_qp +
391 392 min(hermon_log_num_rdb_per_qp, devlim->log_max_ra_req_qp);
392 393 cp->cp_hca_max_rdma_in_qp = cp->cp_hca_max_rdma_out_qp =
393 394 1 << min(hermon_log_num_rdb_per_qp, devlim->log_max_ra_req_qp);
394 395 #endif
395 396
396 397 return (DDI_SUCCESS);
397 398 }
398 399
399 400
400 401 /*
401 402 * hermon_cfg_profile_fini()
402 403 * Context: Only called from attach() and/or detach() path contexts
403 404 */
404 405 void
405 406 hermon_cfg_profile_fini(hermon_state_t *state)
406 407 {
407 408 /*
408 409 * Free up the space for configuration profile
409 410 */
410 411 kmem_free(state->hs_cfg_profile, sizeof (hermon_cfg_profile_t));
411 412 }
412 413
413 414
414 415 /*
415 416 * hermon_cfg_wqe_sizes()
416 417 * Context: Only called from attach() path context
417 418 */
418 419 static void
419 420 hermon_cfg_wqe_sizes(hermon_state_t *state, hermon_cfg_profile_t *cp)
420 421 {
421 422 uint_t max_size, log2;
422 423 uint_t max_sgl, real_max_sgl;
423 424
424 425 /*
425 426 * Get the requested maximum number SGL per WQE from the Hermon
426 427 * patchable variable
427 428 */
428 429 max_sgl = hermon_wqe_max_sgl;
429 430
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430 431 /*
431 432 * Use requested maximum number of SGL to calculate the max descriptor
432 433 * size (while guaranteeing that the descriptor size is a power-of-2
433 434 * cachelines). We have to use the calculation for QP1 MLX transport
434 435 * because the possibility that we might need to inline a GRH, along
435 436 * with all the other headers and alignment restrictions, sets the
436 437 * maximum for the number of SGLs that we can advertise support for.
437 438 */
438 439 max_size = (HERMON_QP_WQE_MLX_QP1_HDRS + (max_sgl << 4));
439 440 log2 = highbit(max_size);
440 - if ((max_size & (max_size - 1)) == 0) {
441 + if (ISP2(max_size)) {
441 442 log2 = log2 - 1;
442 443 }
443 444 max_size = (1 << log2);
444 445
445 446 max_size = min(max_size, state->hs_devlim.max_desc_sz_sq);
446 447
447 448 /*
448 449 * Then use the calculated max descriptor size to determine the "real"
449 450 * maximum SGL (the number beyond which we would roll over to the next
450 451 * power-of-2).
451 452 */
452 453 real_max_sgl = (max_size - HERMON_QP_WQE_MLX_QP1_HDRS) >> 4;
453 454
454 455 /* Then save away this configuration information */
455 456 cp->cp_wqe_max_sgl = max_sgl;
456 457 cp->cp_wqe_real_max_sgl = real_max_sgl;
457 458
458 459 /* SRQ SGL gets set to it's own patchable variable value */
459 460 cp->cp_srq_max_sgl = hermon_srq_max_sgl;
460 461 }
461 462
462 463 #ifdef __sparc
463 464 /*
464 465 * hermon_check_iommu_bypass()
465 466 * Context: Only called from attach() path context
466 467 * XXX This is a DMA allocation routine outside the normal
467 468 * path. FMA hardening will not like this.
468 469 */
469 470 static void
470 471 hermon_check_iommu_bypass(hermon_state_t *state, hermon_cfg_profile_t *cp)
471 472 {
472 473 ddi_dma_handle_t dmahdl;
473 474 ddi_dma_attr_t dma_attr;
474 475 int status;
475 476 ddi_acc_handle_t acc_hdl;
476 477 caddr_t kaddr;
477 478 size_t actual_len;
478 479 ddi_dma_cookie_t cookie;
479 480 uint_t cookiecnt;
480 481
481 482 hermon_dma_attr_init(state, &dma_attr);
482 483
483 484 /* Try mapping for IOMMU bypass (Force Physical) */
484 485 dma_attr.dma_attr_flags = DDI_DMA_FORCE_PHYSICAL |
485 486 DDI_DMA_RELAXED_ORDERING;
486 487
487 488 /*
488 489 * Call ddi_dma_alloc_handle(). If this returns DDI_DMA_BADATTR then
489 490 * it is not possible to use IOMMU bypass with our PCI bridge parent.
490 491 * Since the function we are in can only be called if iommu bypass was
491 492 * requested in the config profile, we configure for bypass if the
492 493 * ddi_dma_alloc_handle() was successful. Otherwise, we configure
493 494 * for non-bypass (ie: normal) mapping.
494 495 */
495 496 status = ddi_dma_alloc_handle(state->hs_dip, &dma_attr,
496 497 DDI_DMA_SLEEP, NULL, &dmahdl);
497 498 if (status == DDI_DMA_BADATTR) {
498 499 cp->cp_iommu_bypass = HERMON_BINDMEM_NORMAL;
499 500 return;
500 501 } else if (status != DDI_SUCCESS) { /* failed somehow */
501 502 hermon_kernel_data_ro = HERMON_RO_DISABLED;
502 503 hermon_user_data_ro = HERMON_RO_DISABLED;
503 504 cp->cp_iommu_bypass = HERMON_BINDMEM_BYPASS;
504 505 return;
505 506 } else {
506 507 cp->cp_iommu_bypass = HERMON_BINDMEM_BYPASS;
507 508 }
508 509
509 510 status = ddi_dma_mem_alloc(dmahdl, 256,
510 511 &state->hs_reg_accattr, DDI_DMA_CONSISTENT,
511 512 DDI_DMA_SLEEP, NULL, (caddr_t *)&kaddr, &actual_len, &acc_hdl);
512 513
513 514 if (status != DDI_SUCCESS) { /* failed somehow */
514 515 hermon_kernel_data_ro = HERMON_RO_DISABLED;
515 516 hermon_user_data_ro = HERMON_RO_DISABLED;
516 517 ddi_dma_free_handle(&dmahdl);
517 518 return;
518 519 }
519 520
520 521 status = ddi_dma_addr_bind_handle(dmahdl, NULL, kaddr, actual_len,
521 522 DDI_DMA_RDWR, DDI_DMA_SLEEP, NULL, &cookie, &cookiecnt);
522 523
523 524 if (status == DDI_DMA_MAPPED) {
524 525 (void) ddi_dma_unbind_handle(dmahdl);
525 526 } else {
526 527 hermon_kernel_data_ro = HERMON_RO_DISABLED;
527 528 hermon_user_data_ro = HERMON_RO_DISABLED;
528 529 }
529 530
530 531 ddi_dma_mem_free(&acc_hdl);
531 532 ddi_dma_free_handle(&dmahdl);
532 533 }
533 534 #endif
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