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4663 apic_cr8pri complicates pcplusmp

*** 142,152 **** uchar_t apic_ipltopri[MAXIPL + 1]; /* unix ipl to apic pri */ /* The taskpri to be programmed into apic to mask given ipl */ #if defined(__amd64) ! uchar_t apic_cr8pri[MAXIPL + 1]; /* unix ipl to cr8 pri */ #endif /* * Correlation of the hardware vector to the IPL in use, initialized * from apic_vectortoipl[] in apic_init(). The final IPLs may not correlate --- 142,152 ---- uchar_t apic_ipltopri[MAXIPL + 1]; /* unix ipl to apic pri */ /* The taskpri to be programmed into apic to mask given ipl */ #if defined(__amd64) ! static unsigned char dummy_cpu_pri[MAXIPL + 1]; #endif /* * Correlation of the hardware vector to the IPL in use, initialized * from apic_vectortoipl[] in apic_init(). The final IPLs may not correlate
*** 299,314 **** for (; j < MAXIPL + 1; j++) /* fill up any empty ipltopri slots */ apic_ipltopri[j] = (i << APIC_IPL_SHIFT) + APIC_BASE_VECT; apic_init_common(); #if defined(__amd64) ! /* ! * Make cpu-specific interrupt info point to cr8pri vector ! */ ! for (i = 0; i <= MAXIPL; i++) ! apic_cr8pri[i] = apic_ipltopri[i] >> APIC_IPL_SHIFT; ! CPU->cpu_pri_data = apic_cr8pri; #else if (cpuid_have_cr8access(CPU)) apic_have_32bit_cr8 = 1; #endif /* __amd64 */ } --- 299,309 ---- for (; j < MAXIPL + 1; j++) /* fill up any empty ipltopri slots */ apic_ipltopri[j] = (i << APIC_IPL_SHIFT) + APIC_BASE_VECT; apic_init_common(); #if defined(__amd64) ! CPU->cpu_pri_data = dummy_cpu_pri; #else if (cpuid_have_cr8access(CPU)) apic_have_32bit_cr8 = 1; #endif /* __amd64 */ }
*** 696,706 **** apic_intr_exit(int prev_ipl, int irq) { apic_cpus_info_t *cpu_infop; #if defined(__amd64) ! setcr8((ulong_t)apic_cr8pri[prev_ipl]); #else if (apic_have_32bit_cr8) setcr8((ulong_t)(apic_ipltopri[prev_ipl] >> APIC_IPL_SHIFT)); else apicadr[APIC_TASK_REG] = apic_ipltopri[prev_ipl]; --- 691,701 ---- apic_intr_exit(int prev_ipl, int irq) { apic_cpus_info_t *cpu_infop; #if defined(__amd64) ! setcr8((ulong_t)(apic_ipltopri[prev_ipl] >> APIC_IPL_SHIFT)); #else if (apic_have_32bit_cr8) setcr8((ulong_t)(apic_ipltopri[prev_ipl] >> APIC_IPL_SHIFT)); else apicadr[APIC_TASK_REG] = apic_ipltopri[prev_ipl];
*** 738,748 **** */ static void apic_setspl(int ipl) { #if defined(__amd64) ! setcr8((ulong_t)apic_cr8pri[ipl]); #else if (apic_have_32bit_cr8) setcr8((ulong_t)(apic_ipltopri[ipl] >> APIC_IPL_SHIFT)); else apicadr[APIC_TASK_REG] = apic_ipltopri[ipl]; --- 733,743 ---- */ static void apic_setspl(int ipl) { #if defined(__amd64) ! setcr8((ulong_t)(apic_ipltopri[ipl] >> APIC_IPL_SHIFT)); #else if (apic_have_32bit_cr8) setcr8((ulong_t)(apic_ipltopri[ipl] >> APIC_IPL_SHIFT)); else apicadr[APIC_TASK_REG] = apic_ipltopri[ipl];