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4663 apic_cr8pri complicates pcplusmp


 354 };
 355 #endif
 356 
 357 static void
 358 apix_init()
 359 {
 360         extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
 361 
 362         APIC_VERBOSE(INIT, (CE_CONT, "apix: psm_softinit\n"));
 363 
 364         do_interrupt_common = apix_do_interrupt;
 365         addintr = apix_add_avintr;
 366         remintr = apix_rem_avintr;
 367         get_pending_spl = apix_get_pending_spl;
 368         get_intr_handler = apix_get_intr_handler;
 369         psm_get_localapicid = apic_get_localapicid;
 370         psm_get_ioapicid = apic_get_ioapicid;
 371 
 372         apix_softinit();
 373 #if defined(__amd64)
 374         /*
 375          * Make cpu-specific interrupt info point to cr8pri vector
 376          */
 377         CPU->cpu_pri_data = dummy_cpu_pri;
 378 #else
 379         if (cpuid_have_cr8access(CPU))
 380                 apic_have_32bit_cr8 = 1;
 381 #endif  /* __amd64 */
 382 
 383         /*
 384          * Initialize IRM pool parameters
 385          */
 386         if (irm_enable) {
 387                 int     i;
 388                 int     lowest_irq;
 389                 int     highest_irq;
 390 
 391                 /* number of CPUs present */
 392                 apix_irminfo.apix_ncpus = apic_nproc;
 393                 /* total number of entries in all of the IOAPICs present */
 394                 lowest_irq = apic_io_vectbase[0];
 395                 highest_irq = apic_io_vectend[0];
 396                 for (i = 1; i < apic_io_max; i++) {




 354 };
 355 #endif
 356 
 357 static void
 358 apix_init()
 359 {
 360         extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
 361 
 362         APIC_VERBOSE(INIT, (CE_CONT, "apix: psm_softinit\n"));
 363 
 364         do_interrupt_common = apix_do_interrupt;
 365         addintr = apix_add_avintr;
 366         remintr = apix_rem_avintr;
 367         get_pending_spl = apix_get_pending_spl;
 368         get_intr_handler = apix_get_intr_handler;
 369         psm_get_localapicid = apic_get_localapicid;
 370         psm_get_ioapicid = apic_get_ioapicid;
 371 
 372         apix_softinit();
 373 #if defined(__amd64)



 374         CPU->cpu_pri_data = dummy_cpu_pri;
 375 #else
 376         if (cpuid_have_cr8access(CPU))
 377                 apic_have_32bit_cr8 = 1;
 378 #endif  /* __amd64 */
 379 
 380         /*
 381          * Initialize IRM pool parameters
 382          */
 383         if (irm_enable) {
 384                 int     i;
 385                 int     lowest_irq;
 386                 int     highest_irq;
 387 
 388                 /* number of CPUs present */
 389                 apix_irminfo.apix_ncpus = apic_nproc;
 390                 /* total number of entries in all of the IOAPICs present */
 391                 lowest_irq = apic_io_vectbase[0];
 392                 highest_irq = apic_io_vectend[0];
 393                 for (i = 1; i < apic_io_max; i++) {